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Searched refs:STM32_SRC_PCLK1 (Results 1 – 7 of 7) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32wba_clock.h24 #define STM32_SRC_PCLK1 (STM32_SRC_HCLK5 + 1) macro
25 #define STM32_SRC_PCLK2 (STM32_SRC_PCLK1 + 1)
Dstm32u5_clock.h26 #define STM32_SRC_PCLK1 (STM32_SRC_HCLK + 1) macro
27 #define STM32_SRC_PCLK2 (STM32_SRC_PCLK1 + 1)
Dstm32h5_clock.h25 #define STM32_SRC_PCLK1 (STM32_SRC_HCLK + 1) macro
26 #define STM32_SRC_PCLK2 (STM32_SRC_PCLK1 + 1)
Dstm32h7_clock.h52 #define STM32_SRC_PCLK1 STM32_CLOCK_BUS_APB1 macro
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wba.c49 (src_clk == STM32_SRC_PCLK1) || in enabled_clock()
211 case STM32_SRC_PCLK1: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_h5.c123 (src_clk == STM32_SRC_PCLK1) || in enabled_clock()
237 case STM32_SRC_PCLK1: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_u5.c128 (src_clk == STM32_SRC_PCLK1) || in enabled_clock()
246 case STM32_SRC_PCLK1: in stm32_clock_control_get_subsys_rate()