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Searched refs:STM32_PLL3_P_DIVISOR (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_h5.c327 STM32_PLL3_P_DIVISOR); in stm32_clock_control_get_subsys_rate()
595 LL_RCC_PLL3_SetP(STM32_PLL3_P_DIVISOR); in set_up_plls()
Dclock_stm32_ll_u5.c343 STM32_PLL3_P_DIVISOR); in stm32_clock_control_get_subsys_rate()
679 LL_RCC_PLL3_SetP(STM32_PLL3_P_DIVISOR); in set_up_plls()
Dclock_stm32_ll_h7.c624 STM32_PLL3_P_DIVISOR);
957 LL_RCC_PLL3_SetP(STM32_PLL3_P_DIVISOR);
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h226 #define STM32_PLL3_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_p, 1) macro