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Searched refs:STM32_PLL3_ENABLED (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_h5.c321 #if defined(STM32_PLL3_ENABLED) in stm32_clock_control_get_subsys_rate()
431 defined(STM32_PLL3_ENABLED) in set_up_plls()
559 #if defined(STM32_PLL3_ENABLED) in set_up_plls()
Dclock_stm32_ll_u5.c336 #if defined(STM32_PLL3_ENABLED) in stm32_clock_control_get_subsys_rate()
513 defined(STM32_PLL3_ENABLED) in set_up_plls()
647 #if defined(STM32_PLL3_ENABLED) in set_up_plls()
Dclock_stm32_ll_h7.c616 #if defined(STM32_PLL3_ENABLED)
766 #if defined(STM32_PLL_ENABLED) || defined(STM32_PLL2_ENABLED) || defined(STM32_PLL3_ENABLED)
932 #if defined(STM32_PLL3_ENABLED)
Dclock_stm32_ll_common.c240 if (!IS_ENABLED(STM32_PLL3_ENABLED)) { in enabled_clock()
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h216 #define STM32_PLL3_ENABLED 1 macro