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Searched refs:STM32_PLL2_SRC_HSE (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32f1.c156 if (!IS_ENABLED(STM32_PLL2_SRC_HSE)) { in config_pll2()
Dclock_stm32_ll_h5.c57 (IS_ENABLED(STM32_PLL2_SRC_HSE) && pll_id == PLL2_ID) || in get_pllsrc_frequency()
512 if (IS_ENABLED(STM32_PLL2_SRC_HSE)) { in set_up_plls()
Dclock_stm32_ll_u5.c62 (IS_ENABLED(STM32_PLL2_SRC_HSE) && pll_id == PLL2_ID) || in get_pllsrc_frequency()
599 if (IS_ENABLED(STM32_PLL2_SRC_HSE)) { in set_up_plls()
Dclock_stm32_ll_n6.c62 (IS_ENABLED(STM32_PLL2_SRC_HSE) && pll_id == PLL2_ID) || in get_pllsrc_frequency()
663 if (IS_ENABLED(STM32_PLL2_SRC_HSE)) { in set_up_plls()
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h332 #define STM32_PLL2_SRC_HSE 1 macro