Home
last modified time | relevance | path

Searched refs:STM32_HSE_ENABLED (Results 1 – 10 of 10) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wba.c52 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()
262 #if defined(STM32_HSE_ENABLED) in stm32_clock_control_get_subsys_rate()
369 if (IS_ENABLED(STM32_HSE_ENABLED)) { in stm32_clock_switch_to_hsi()
448 if (IS_ENABLED(STM32_HSE_ENABLED)) { in set_up_fixed_clock_sources()
Dclock_stm32_ll_h5.c126 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()
262 #if defined(STM32_HSE_ENABLED) in stm32_clock_control_get_subsys_rate()
624 if (IS_ENABLED(STM32_HSE_ENABLED)) { in set_up_fixed_clock_sources()
Dclock_stm32_ll_u5.c131 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()
278 #if defined(STM32_HSE_ENABLED) in stm32_clock_control_get_subsys_rate()
707 if (IS_ENABLED(STM32_HSE_ENABLED)) { in set_up_fixed_clock_sources()
Dclock_stm32_ll_wb0.c545 if (IS_ENABLED(STM32_HSE_ENABLED)) { in set_up_fixed_clock_sources()
745 BUILD_ASSERT(IS_ENABLED(STM32_HSE_ENABLED), in stm32_clock_control_init()
Dclock_stm32_ll_n6.c161 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()
312 #if defined(STM32_HSE_ENABLED) in stm32_clock_control_get_subsys_rate()
805 if (IS_ENABLED(STM32_HSE_ENABLED)) { in set_up_fixed_clock_sources()
Dclock_stm32_ll_h7.c364 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) ||
531 #if defined(STM32_HSE_ENABLED)
670 if (IS_ENABLED(STM32_HSE_ENABLED)) {
Dclock_stm32_ll_common.c133 if (!IS_ENABLED(STM32_HSE_ENABLED)) { in enabled_clock()
628 if (IS_ENABLED(STM32_HSE_ENABLED)) { in set_up_fixed_clock_sources()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/src/
Dtest_stm32_clock_configuration.c80 #if STM32_HSE_ENABLED
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/src/
Dtest_stm32_clock_configuration.c109 #if STM32_HSE_ENABLED
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h461 #define STM32_HSE_ENABLED 1 macro
464 #define STM32_HSE_ENABLED 1 macro
469 #define STM32_HSE_ENABLED 1 macro
474 #define STM32_HSE_ENABLED 1 macro
478 #define STM32_HSE_ENABLED 1 macro