Searched refs:SPI1_SEL (Results 1 – 10 of 10) sorted by relevance
| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/boards/ |
| D | spi1_sysclk.overlay | 15 <&rcc STM32_SRC_SYSCLK SPI1_SEL(1)>;
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| D | spi1_hsi_16.overlay | 19 <&rcc STM32_SRC_HSI16 SPI1_SEL(2)>;
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| D | spi1_msik.overlay | 21 <&rcc STM32_SRC_MSIK SPI1_SEL(3)>;
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| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | stm32wba_clock.h | 61 #define SPI1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 20, CCIPR1_REG) macro
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| D | stm32h7rs_clock.h | 94 #define SPI1_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 8, D3CCIPR_REG) macro
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| D | stm32u5_clock.h | 78 #define SPI1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 20, CCIPR1_REG) macro
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| D | stm32h5_clock.h | 92 #define SPI1_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 0, CCIPR3_REG) macro
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| D | stm32n6_clock.h | 127 #define SPI1_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 4, CCIPR9_REG) macro
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| /Zephyr-latest/dts/arm/st/h5/ |
| D | stm32h5.dtsi | 494 <&rcc STM32_SRC_PLL1_Q SPI1_SEL(0)>;
589 <&rcc STM32_SRC_PLL1_Q SPI1_SEL(0)>;
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| /Zephyr-latest/dts/arm/st/h7rs/ |
| D | stm32h7rs.dtsi | 437 <&rcc STM32_SRC_PLL1_Q SPI1_SEL(0)>;
490 <&rcc STM32_SRC_PLL1_Q SPI1_SEL(0)>;
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