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Searched refs:RV_FPREG_SAVE (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/tests/kernel/fpu_sharing/generic/src/
Dfloat_regs_riscv_gcc.h24 #define RV_FPREG_SAVE "fsd " macro
28 #define RV_FPREG_SAVE "fsw " macro
138 RV_FPREG_SAVE "f0, 0(t0)\n" in _store_all_float_registers()
140 RV_FPREG_SAVE "f1, 0(t0)\n" in _store_all_float_registers()
142 RV_FPREG_SAVE "f2, 0(t0)\n" in _store_all_float_registers()
144 RV_FPREG_SAVE "f3, 0(t0)\n" in _store_all_float_registers()
146 RV_FPREG_SAVE "f4, 0(t0)\n" in _store_all_float_registers()
148 RV_FPREG_SAVE "f5, 0(t0)\n" in _store_all_float_registers()
150 RV_FPREG_SAVE "f6, 0(t0)\n" in _store_all_float_registers()
152 RV_FPREG_SAVE "f7, 0(t0)\n" in _store_all_float_registers()
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