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Searched refs:RV_FPREG_LOAD (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/tests/kernel/fpu_sharing/generic/src/
Dfloat_regs_riscv_gcc.h25 #define RV_FPREG_LOAD "fld " macro
29 #define RV_FPREG_LOAD "flw " macro
53 RV_FPREG_LOAD "f0, 0(t0)\n" in _load_all_float_registers()
55 RV_FPREG_LOAD "f1, 0(t0)\n" in _load_all_float_registers()
57 RV_FPREG_LOAD "f2, 0(t0)\n" in _load_all_float_registers()
59 RV_FPREG_LOAD "f3, 0(t0)\n" in _load_all_float_registers()
61 RV_FPREG_LOAD "f4, 0(t0)\n" in _load_all_float_registers()
63 RV_FPREG_LOAD "f5, 0(t0)\n" in _load_all_float_registers()
65 RV_FPREG_LOAD "f6, 0(t0)\n" in _load_all_float_registers()
67 RV_FPREG_LOAD "f7, 0(t0)\n" in _load_all_float_registers()
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