Home
last modified time | relevance | path

Searched refs:RSTMGR_L4SYSTIMER0_RSTLINE (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dintel_socfpga_reset.h106 #define RSTMGR_L4SYSTIMER0_RSTLINE 324 macro
/Zephyr-latest/dts/arm64/intel/
Dintel_socfpga_agilex5.dtsi167 resets = <&reset RSTMGR_L4SYSTIMER0_RSTLINE>;