Searched refs:RM_COMM_REG (Results 1 – 3 of 3) sorted by relevance
/Zephyr-latest/drivers/dma/ |
D | dma_iproc_pax_v2.c | 265 if ((sys_read32(RM_COMM_REG(pd, RM_COMM_MAIN_HW_INIT_DONE)) & in init_rm() 290 val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 292 sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 303 sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 305 RM_COMM_REG(pd, RM_COMM_MSI_DISABLE)); in rm_cfg_start() 307 val = sys_read32(RM_COMM_REG(pd, RM_COMM_AXI_READ_BURST_THRESHOLD)); in rm_cfg_start() 312 sys_write32(val, RM_COMM_REG(pd, RM_COMM_AXI_READ_BURST_THRESHOLD)); in rm_cfg_start() 314 val = sys_read32(RM_COMM_REG(pd, RM_COMM_FIFO_FULL_THRESHOLD)); in rm_cfg_start() 324 sys_write32(val, RM_COMM_REG(pd, RM_COMM_FIFO_FULL_THRESHOLD)); in rm_cfg_start() 327 val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() [all …]
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D | dma_iproc_pax_v1.c | 244 if ((sys_read32(RM_COMM_REG(pd, RM_COMM_MAIN_HW_INIT_DONE)) & in init_rm() 269 val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 271 sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 275 sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 279 RM_COMM_REG(pd, RM_COMM_MSI_DISABLE)); in rm_cfg_start() 281 val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 283 sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 286 sys_write32(RM_COMM_AE_TIMEOUT_VAL, RM_COMM_REG(pd, in rm_cfg_start() 288 val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() 290 sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL)); in rm_cfg_start() [all …]
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D | dma_iproc_pax.h | 368 #define RM_COMM_REG(_pd, _write_ptr) ((_pd)->rm_comm_base + (_write_ptr)) macro
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