265 		if ((sys_read32(RM_COMM_REG(pd, RM_COMM_MAIN_HW_INIT_DONE)) &  in init_rm()
290 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
292 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
303 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
305 		    RM_COMM_REG(pd, RM_COMM_MSI_DISABLE));  in rm_cfg_start()
307 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_AXI_READ_BURST_THRESHOLD));  in rm_cfg_start()
312 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_AXI_READ_BURST_THRESHOLD));  in rm_cfg_start()
314 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_FIFO_FULL_THRESHOLD));  in rm_cfg_start()
324 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_FIFO_FULL_THRESHOLD));  in rm_cfg_start()
327 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
329 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
333 		    RM_COMM_REG(pd, RM_COMM_AE_TIMEOUT));  in rm_cfg_start()
334 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
336 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_start()
339 	val = sys_read32(RM_COMM_REG(pd, RM_AE0_AE_CONTROL));  in rm_cfg_start()
341 	sys_write32(val, RM_COMM_REG(pd, RM_AE0_AE_CONTROL));  in rm_cfg_start()
343 	sys_write32(val, RM_COMM_REG(pd, RM_AE0_AE_CONTROL));  in rm_cfg_start()
346 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_AXI_CONTROL));  in rm_cfg_start()
348 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_AXI_CONTROL));  in rm_cfg_start()
352 		    RM_COMM_REG(pd, RM_COMM_TIMER_CONTROL_0));  in rm_cfg_start()
354 		    RM_COMM_REG(pd, RM_COMM_TIMER_CONTROL_1));  in rm_cfg_start()
355 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_BURST_LENGTH));  in rm_cfg_start()
360 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_BURST_LENGTH));  in rm_cfg_start()
362 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_BD_FETCH_MODE_CONTROL));  in rm_cfg_start()
365 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_BD_FETCH_MODE_CONTROL));  in rm_cfg_start()
368 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_MASK_SEQUENCE_MAX_COUNT));  in rm_cfg_start()
370 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_MASK_SEQUENCE_MAX_COUNT));  in rm_cfg_start()
393 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_finish()
395 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_CONTROL));  in rm_cfg_finish()
441 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL));  in init_ring()
443 	sys_write32(val,  RM_COMM_REG(pd, RM_COMM_CONTROL));  in init_ring()
464 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CONTROL));  in init_ring()
466 	sys_write32(val,  RM_COMM_REG(pd, RM_COMM_CONTROL));  in init_ring()
468 	val = sys_read32(RM_COMM_REG(pd, RM_COMM_CTRL_REG(idx)));  in init_ring()
470 	sys_write32(val, RM_COMM_REG(pd, RM_COMM_CTRL_REG(idx)));  in init_ring()
649 	sys_read32(RM_COMM_REG(pd,  in rm_isr()
652 		    RM_COMM_REG(pd,  in rm_isr()