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Searched refs:RCAR_GP_PIN (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/drivers/pinctrl/renesas/rcar/
Dpfc_r8a779f0.c15 { RCAR_GP_PIN(0, 7), 28, 3 }, /* TX0 */
16 { RCAR_GP_PIN(0, 6), 24, 3 }, /* RX0 */
17 { RCAR_GP_PIN(0, 5), 20, 3 }, /* HRTS0_N */
18 { RCAR_GP_PIN(0, 4), 16, 3 }, /* HCTS0_N */
19 { RCAR_GP_PIN(0, 3), 12, 3 }, /* HTX0 */
20 { RCAR_GP_PIN(0, 2), 8, 3 }, /* HRX0 */
21 { RCAR_GP_PIN(0, 1), 4, 3 }, /* HSCK0 */
22 { RCAR_GP_PIN(0, 0), 0, 3 }, /* SCIF_CLK */
26 { RCAR_GP_PIN(0, 15), 28, 3 }, /* MSIOF0_SS1 */
27 { RCAR_GP_PIN(0, 14), 24, 3 }, /* MSIOF0_SCK */
[all …]
Dpfc_r8a77951.c52 { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */
53 { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */
54 { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */
58 { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */
59 { RCAR_GP_PIN(2, 13), 24, 3 }, /* AVB_AVTP_MATCH */
60 { RCAR_GP_PIN(2, 14), 20, 3 }, /* AVB_AVTP_CAPTURE */
61 { RCAR_GP_PIN(2, 0), 16, 3 }, /* IRQ0 */
62 { RCAR_GP_PIN(2, 1), 12, 3 }, /* IRQ1 */
63 { RCAR_GP_PIN(2, 2), 8, 3 }, /* IRQ2 */
64 { RCAR_GP_PIN(2, 3), 4, 3 }, /* IRQ3 */
[all …]
Dpfc_r8a77961.c52 { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */
53 { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */
54 { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */
58 { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */
59 { RCAR_GP_PIN(2, 13), 24, 3 }, /* AVB_AVTP_MATCH */
60 { RCAR_GP_PIN(2, 14), 20, 3 }, /* AVB_AVTP_CAPTURE */
61 { RCAR_GP_PIN(2, 0), 16, 3 }, /* IRQ0 */
62 { RCAR_GP_PIN(2, 1), 12, 3 }, /* IRQ1 */
63 { RCAR_GP_PIN(2, 2), 8, 3 }, /* IRQ2 */
64 { RCAR_GP_PIN(2, 3), 4, 3 }, /* IRQ3 */
[all …]
Dpfc_rcar.c210 [0] = RCAR_GP_PIN(3, 0), /* SD0_CLK */
211 [1] = RCAR_GP_PIN(3, 1), /* SD0_CMD */
212 [2] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */
213 [3] = RCAR_GP_PIN(3, 3), /* SD0_DAT1 */
214 [4] = RCAR_GP_PIN(3, 4), /* SD0_DAT2 */
215 [5] = RCAR_GP_PIN(3, 5), /* SD0_DAT3 */
216 [6] = RCAR_GP_PIN(3, 6), /* SD1_CLK */
217 [7] = RCAR_GP_PIN(3, 7), /* SD1_CMD */
218 [8] = RCAR_GP_PIN(3, 8), /* SD1_DAT0 */
219 [9] = RCAR_GP_PIN(3, 9), /* SD1_DAT1 */
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-r8a779f0.h13 #define PIN_SCIF_CLK RCAR_GP_PIN(0, 0)
14 #define PIN_HSCK0 RCAR_GP_PIN(0, 1)
15 #define PIN_HRX0 RCAR_GP_PIN(0, 2)
16 #define PIN_HTX0 RCAR_GP_PIN(0, 3)
17 #define PIN_HCTS0_N RCAR_GP_PIN(0, 4)
18 #define PIN_HRTS0_N RCAR_GP_PIN(0, 5)
19 #define PIN_RX0 RCAR_GP_PIN(0, 6)
20 #define PIN_TX0 RCAR_GP_PIN(0, 7)
21 #define PIN_SCK0 RCAR_GP_PIN(0, 8)
22 #define PIN_RTS0_N RCAR_GP_PIN(0, 9)
[all …]
Dpinctrl-r8a77951.h13 #define PIN_D0 RCAR_GP_PIN(0, 0)
14 #define PIN_D1 RCAR_GP_PIN(0, 1)
15 #define PIN_D2 RCAR_GP_PIN(0, 2)
16 #define PIN_D3 RCAR_GP_PIN(0, 3)
17 #define PIN_D4 RCAR_GP_PIN(0, 4)
18 #define PIN_D5 RCAR_GP_PIN(0, 5)
19 #define PIN_D6 RCAR_GP_PIN(0, 6)
20 #define PIN_D7 RCAR_GP_PIN(0, 7)
21 #define PIN_D8 RCAR_GP_PIN(0, 8)
22 #define PIN_D9 RCAR_GP_PIN(0, 9)
[all …]
Dpinctrl-r8a77961.h14 #define PIN_D0 RCAR_GP_PIN(0, 0)
15 #define PIN_D1 RCAR_GP_PIN(0, 1)
16 #define PIN_D2 RCAR_GP_PIN(0, 2)
17 #define PIN_D3 RCAR_GP_PIN(0, 3)
18 #define PIN_D4 RCAR_GP_PIN(0, 4)
19 #define PIN_D5 RCAR_GP_PIN(0, 5)
20 #define PIN_D6 RCAR_GP_PIN(0, 6)
21 #define PIN_D7 RCAR_GP_PIN(0, 7)
22 #define PIN_D8 RCAR_GP_PIN(0, 8)
23 #define PIN_D9 RCAR_GP_PIN(0, 9)
[all …]
Dpinctrl-rcar-common.h36 #define RCAR_GP_PIN(bank, pin) (((bank) * 32U) + (pin)) macro