P8 (reference) in projects: Zephyr-latest

Searched refs:P8 (Results 1 – 12 of 12) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
D	ifx_cat1-pinctrl.h	`82 #define P8 CYHAL_PORT_8 macro`
/Zephyr-latest/boards/bbc/microbit_v2/
D	bbc_microbit_v2.dts	`90 <8 0 &gpio0 10 0>, /* P8 */`
/Zephyr-latest/boards/nordic/thingy53/
D	thingy53_nrf5340_cpunet.dts	`77 <8 0 &gpio0 5 0>, /* P8, P0.05/AIN1 */`
D	thingy53_nrf5340_common.dtsi	`71 gpio-map = <8 0 &gpio0 5 0>, /* P8, P0.05/AIN1 */`
/Zephyr-latest/boards/bbc/microbit/
D	bbc_microbit.dts	`91 <8 0 &gpio0 18 0>, /* P8 */`
/Zephyr-latest/boards/st/steval_fcu001v1/doc/
D	index.rst	`106 The programmer is attached to the P8 programming header with ARM-JTAG-20-10-Plug-in Adapter.`
/Zephyr-latest/boards/madmachine/mm_feather/doc/
D	index.rst	`103 \| P8 \| GPIO_AD_B1_13 \| D8 \| GPIO1_IO29 \| \| \|`
/Zephyr-latest/boards/adi/sdp_k1/doc/
D	index.rst	`113 - UART_5 TX/RX : P8 (DAPLink two position through hole)`
/Zephyr-latest/boards/madmachine/mm_swiftio/doc/
D	index.rst	`83 \| P8 \| GPIO_B0_01 \| D8 \| GPIO2_IO01 \| \| \|`
/Zephyr-latest/boards/beagle/beaglev_fire/doc/
D	index.rst	`9 RISC-V architecture and FPGA technology. It has the same P8 & P9 cape header pins as BeagleBone`
/Zephyr-latest/boards/nordic/nrf52dk/doc/
D	index.rst	`263 P2/P8 Analog in`
/Zephyr-latest/doc/safety/images/
D	zephyr-safety-process.svg	`1 …aBQ58zVjFjOdGlGdE1ATHhMtHzEO2tBQh1wiuOI5BGNqCK/KnPuo002vBhSzBFVhiq42Ko8S3o/P8+an5armhqU2oM9X2UjMyX…`