Searched refs:P3 (Results 1 – 24 of 24) sorted by relevance
7 /* Connect P3.2 <-> P4.3 and P3.3 <-> P4.4 */
10 * P3.8, P3.7, P1.9, P3.15 must all be connected (sda related pins)
10 /* Unplug jumpers from P3 and P2 and bridge PD0/PD1 */11 out-gpios = <&gpiod 0 0>; /* P3 pin 2 (PD0) */
176 FTDI chip. The UART pins on ArgonKey can be found on the P3 low speed179 - GND (black) to ArgonKey GND (P3.1)180 - TXD (orange) to ArgonKey UART0_TXD (P3.5)181 - RXD (yellow) to ArgonKey UART0_RXD (P3.7)188 - Connect BOOT0 to 1V8 (link P2.1 to P3.30)
31 #define BT_ADDR_INIT(P0, P1, P2, P3, P4, P5) \ argument32 (&(bt_addr_t){ { P0, P1, P2, P3, P4, P5 } })
77 #define P3 CYHAL_PORT_3 macro
59 the back of the board on P3.5 (TX) and P3.7 (RX). User may use a simple
267 | | | | 1-2 | | | Connects LPUART0B_RX (P3.0) to the SWD connector. …269 | | | | 3-4 | | | Connects LPUART0B_TX (P3.1) to the SWD connector. …271 | | | | Open | | | Disconnects LPUART0B_RX (P3.0) and LPUART0B_TX (P3…
46 the back of the board on P3.5 (TX) and P3.7 (RX).
85 <3 0 &gpio0 31 0>, /* P3 */
95 - SPI0_TX : P3
94 - I2C1_SCL : P3
96 - SPI0_TX : P3
86 <3 0 &gpio0 4 0>, /* P3, Analog in, LED Col 1 */
104 - I2C1_SCL : P3
216 on corresponding connectors ``P4``, ``P3``.221 P3.2 PTD9 LPI2C1_SCL222 P3.3 PTD8 LPI2C1_SDA
116 Connect a USB to FTDI RX, TX & GND pins to P3 Connector.
93 | P3 | GPIO_AD_B1_10 | D3 | GPIO1_IO26 | | |
73 | P3 | GPIO_AD_B0_02 | D3 | GPIO1_IO02 | | |
110 | 28 | P3 | nRF9160 P0.03 | gpio0 |
281 P3/P9 Digital I/O
156 * BUTTON4 = SW4 = via TCA9538 port expander channel P3 (active low)
276 | P3 | AIN4 mode |
55 - ``P2`` stays the same from ``A → B``, as do ``P1`` and ``P3`` from ``F →57 - ``P3`` moves forward from ``A → B``.58 - ``P3`` moves backward from ``C → D``.63 - Project repository commits can be "skipped": ``P3`` moves forward
