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Searched refs:NDS_MCACHE_CTL (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/soc/andestech/ae350/
Dstart.S28 csrs NDS_MCACHE_CTL, t0
37 csrc NDS_MCACHE_CTL, t0
39 csrs NDS_MCACHE_CTL, t0
42 csrr t0, NDS_MCACHE_CTL
50 csrr t0, NDS_MCACHE_CTL
Dsoc_v5.h12 #define NDS_MCACHE_CTL 0x7CA macro
/Zephyr-latest/drivers/cache/
Dcache_andes.c214 csr_set(NDS_MCACHE_CTL, MCACHE_CTL_DC_COHEN); in cache_data_enable()
217 if (csr_read(NDS_MCACHE_CTL) & MCACHE_CTL_DC_COHEN) { in cache_data_enable()
219 while (!(csr_read(NDS_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA)) { in cache_data_enable()
225 csr_set(NDS_MCACHE_CTL, MCACHE_CTL_DC_EN); in cache_data_enable()
253 csr_clear(NDS_MCACHE_CTL, MCACHE_CTL_DC_EN); in cache_data_disable()
256 if (csr_read(NDS_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA) { in cache_data_disable()
257 csr_clear(NDS_MCACHE_CTL, MCACHE_CTL_DC_COHEN); in cache_data_disable()
259 while (csr_read(NDS_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA) { in cache_data_disable()
273 csr_set(NDS_MCACHE_CTL, MCACHE_CTL_IC_EN); in cache_instr_enable()
282 csr_clear(NDS_MCACHE_CTL, MCACHE_CTL_IC_EN); in cache_instr_disable()
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/Zephyr-latest/soc/telink/tlsr/tlsr951x/
Dstart.S7 #define NDS_MCACHE_CTL 0x7CA macro
35 csrr t0, NDS_MCACHE_CTL
38 csrw NDS_MCACHE_CTL, t0