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Searched refs:MT_NORMAL (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/soc/nxp/imx/imx9/imx93/a55/
Dmmu_regions.c44 DT_REG_SIZE(DT_NODELABEL(outbox)), MT_NORMAL | MT_P_RW_U_NA | MT_NS),
47 DT_REG_SIZE(DT_NODELABEL(inbox)), MT_NORMAL | MT_P_RW_U_NA | MT_NS),
50 DT_REG_SIZE(DT_NODELABEL(stream)), MT_NORMAL | MT_P_RW_U_NA | MT_NS),
54 MT_NORMAL | MT_P_RW_U_NA | MT_NS),
/Zephyr-latest/soc/brcm/bcmvk/viper/a72/
Dmmu_regions.c28 MT_NORMAL | MT_P_RW_U_NA | MT_SECURE),
/Zephyr-latest/include/zephyr/arch/arm64/
Darm_mmu.h26 #define MT_NORMAL 4U macro
33 (0xffUL << (MT_NORMAL * 8)) | \
/Zephyr-latest/arch/arm64/core/
Dmmu.c223 MMU_DEBUG((mem_type == MT_NORMAL) ? "MEM" : in debug_show_pte()
712 case MT_NORMAL: in get_region_desc()
723 if (mem_type == MT_NORMAL) { in get_region_desc()
810 .attrs = MT_NORMAL | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE },
816 .attrs = MT_NORMAL | MT_P_RX_U_RX | MT_DEFAULT_SECURE_STATE },
822 .attrs = MT_NORMAL | MT_P_RO_U_RO | MT_DEFAULT_SECURE_STATE },
868 if (MT_TYPE(attrs) == MT_NORMAL || MT_TYPE(attrs) == MT_NORMAL_WT) { in inv_dcache_after_map_helper()
1087 entry_flags |= MT_NORMAL; in __arch_mem_map()
1128 mem_flags = (mem_flags == K_MEM_CACHE_WB) ? MT_NORMAL : MT_NORMAL_WT; in arch_mem_map()
1272 ptn->size, ptn->attr.attrs | MT_NORMAL); in arch_mem_domain_partition_add()
[all …]
/Zephyr-latest/include/zephyr/arch/arm/mmu/
Darm_mmu.h30 #define MT_NORMAL BIT(2) macro
/Zephyr-latest/arch/arm/core/mmu/
Darm_mmu.c75 .attrs = MT_NORMAL | MATTR_SHARED |
83 .attrs = MT_NORMAL | MATTR_SHARED |
99 .attrs = MT_NORMAL | MATTR_SHARED |
314 } else if (attrs & MT_NORMAL) { in arm_mmu_convert_attr_flags()
896 conv_flags |= MT_NORMAL; in __arch_mem_map()
907 conv_flags |= MT_NORMAL; in __arch_mem_map()