Searched refs:K_CACHE_WB (Results 1 – 3 of 3) sorted by relevance
54 #define K_CACHE_WB BIT(0) macro56 #define K_CACHE_WB_INVD (K_CACHE_WB | K_CACHE_INVD)153 case K_CACHE_WB: in nds_l1d_cache_all()186 case K_CACHE_WB: in nds_l1d_cache_range()295 ret |= nds_l2_cache_all(K_CACHE_WB); in cache_data_invd_all()298 ret |= nds_l1d_cache_all(K_CACHE_WB); in cache_data_invd_all()299 ret |= nds_l2_cache_all(K_CACHE_WB); in cache_data_invd_all()397 ret |= nds_l2_cache_all(K_CACHE_WB); in cache_data_flush_all()399 ret |= nds_l1d_cache_all(K_CACHE_WB); in cache_data_flush_all()400 ret |= nds_l2_cache_all(K_CACHE_WB); in cache_data_flush_all()[all …]
47 #define K_CACHE_WB BIT(0) macro49 #define K_CACHE_WB_INVD (K_CACHE_WB | K_CACHE_INVD)103 case K_CACHE_WB: in nds_l2_cache_all()156 case K_CACHE_WB: in nds_l2_cache_range()
21 #define K_CACHE_WB BIT(0) macro23 #define K_CACHE_WB_INVD (K_CACHE_WB | K_CACHE_INVD)83 if (op != K_CACHE_INVD && op != K_CACHE_WB && op != K_CACHE_WB_INVD) { in arm64_dcache_range()127 } else if (op == K_CACHE_WB) { in arm64_dcache_range()159 return arm64_dcache_range(addr, size, K_CACHE_WB); in arch_dcache_flush_range()
