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Searched refs:IT8XXX2_ECPM_SCDCR0 (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/soc/ite/ec/it8xxx2/
Dsoc.c193 IT8XXX2_ECPM_SCDCR0 = (2 << 4); in chip_run_pll_sequence()
201 IT8XXX2_ECPM_SCDCR0 = (pll->div_fnd << 4) | pll->div_mcu; in chip_run_pll_sequence()
216 ((IT8XXX2_ECPM_SCDCR0 & 0xf0) != (pll->div_fnd << 4)) || in chip_configure_pll()
/Zephyr-latest/soc/ite/ec/common/
Dchip_chipregs.h1277 #define IT8XXX2_ECPM_SCDCR0 ECREG(IT8XXX2_ECPM_BASE + 0x0c) macro