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Searched refs:IT8XXX2_ECPM_BASE (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/soc/ite/ec/common/
Dchip_chipregs.h1259 #define IT8XXX2_ECPM_BASE 0x00F01E00 macro
1272 #define IT8XXX2_ECPM_PLLCTRL ECREG(IT8XXX2_ECPM_BASE + 0x03)
1273 #define IT8XXX2_ECPM_AUTOCG ECREG(IT8XXX2_ECPM_BASE + 0x04)
1274 #define IT8XXX2_ECPM_CGCTRL3R ECREG(IT8XXX2_ECPM_BASE + 0x05)
1275 #define IT8XXX2_ECPM_PLLFREQR ECREG(IT8XXX2_ECPM_BASE + 0x06)
1276 #define IT8XXX2_ECPM_PLLCSS ECREG(IT8XXX2_ECPM_BASE + 0x08)
1277 #define IT8XXX2_ECPM_SCDCR0 ECREG(IT8XXX2_ECPM_BASE + 0x0c)
1278 #define IT8XXX2_ECPM_SCDCR1 ECREG(IT8XXX2_ECPM_BASE + 0x0d)
1279 #define IT8XXX2_ECPM_SCDCR2 ECREG(IT8XXX2_ECPM_BASE + 0x0e)
1280 #define IT8XXX2_ECPM_SCDCR3 ECREG(IT8XXX2_ECPM_BASE + 0x0f)
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/Zephyr-latest/drivers/i2c/
Di2c_ite_it8xxx2.c1112 (IT8XXX2_ECPM_BASE + (config->clock_gate_offset >> 8)); in i2c_it8xxx2_init()
Di2c_ite_enhance.c1191 (IT8XXX2_ECPM_BASE + (config->clock_gate_offset >> 8)); in i2c_enhance_init()