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Searched refs:IDT (Results 1 – 15 of 15) sorted by relevance

/Zephyr-latest/arch/x86/core/intel64/
Dlocore.S905 #define IDT(nr, type, ist) \ macro
933 IDT( 0, TRAP, EXC_STACK); IDT( 1, TRAP, EXC_STACK)
934 IDT( 2, TRAP, NMI_STACK); IDT( 3, TRAP, EXC_STACK)
935 IDT( 4, TRAP, EXC_STACK); IDT( 5, TRAP, EXC_STACK)
936 IDT( 6, TRAP, EXC_STACK); IDT( 7, TRAP, EXC_STACK)
937 IDT( 8, TRAP, BAD_STACK); IDT( 9, TRAP, EXC_STACK)
938 IDT( 10, TRAP, EXC_STACK); IDT( 11, TRAP, EXC_STACK)
939 IDT( 12, TRAP, EXC_STACK); IDT( 13, TRAP, EXC_STACK)
940 IDT( 14, TRAP, EXC_STACK); IDT( 15, TRAP, EXC_STACK)
941 IDT( 16, TRAP, EXC_STACK); IDT( 17, TRAP, EXC_STACK)
[all …]
/Zephyr-latest/tests/arch/x86/static_idt/
DREADME.txt1 Title: Static IDT Support
5 This test verifies that the static IDT feature operates as expected.
19 tc_start() - Starting static IDT tests
20 Testing to see if IDT has address of test stubs()
/Zephyr-latest/drivers/interrupt_controller/
DKconfig.loapic35 IDT vector to use for spurious LOAPIC interrupts. Note that some
37 If this value is left at -1 the last entry in the IDT will be used.
/Zephyr-latest/arch/x86/core/
DKconfig.intel6444 int "IDT vector to use for scheduler IPI"
50 int "IDT vector to use for TLB shootdown IPI"
DKconfig.ia3217 int "Number of IDT vectors"
22 Interrupt Descriptor Table (IDT). By default all 256 vectors are
23 supported in an IDT requiring 2048 bytes of memory.
/Zephyr-latest/include/zephyr/arch/x86/ia32/scripts/
Dshared_kernel_pages.ld11 * user mode page tables. IDT, GDT, TSSes, trampoline stack, and
/Zephyr-latest/include/zephyr/arch/x86/
Dmemory.ld105 * On 32-bit x86, fake memory area for build-time IDT generation data.
/Zephyr-latest/doc/kernel/services/
Dinterrupts.rst29 An :abbr:`IDT (Interrupt Descriptor Table)` or a vector table is used
39 The kernel provides a default ISR for all unused IDT entries. This ISR
679 Descriptor Table (IDT) which must be laid out in a certain way per the x86
686 48-63, and so forth. When the :ref:`gen_idt.py` tool is constructing the IDT, when it
695 It is the address of this assembly interrupt stub which gets placed in the IDT.
697 ISR is placed directly in the IDT.
703 configured vector in the IDT. This is used at runtime by :c:macro:`IRQ_CONNECT`
/Zephyr-latest/include/zephyr/arch/x86/intel64/
Dlinker.ld56 * On x86-64 the IDT is in rodata and doesn't need to be in the
/Zephyr-latest/doc/
Dglossary.rst105 IDT
107 architecture to implement an interrupt vector table. The IDT is used
/Zephyr-latest/doc/services/debugging/
Dgdbstub.rst187 254 /* Hook current IDT. */
/Zephyr-latest/doc/hardware/porting/
Darch.rst353 For example, x86 has the concept of an :abbr:`IDT (Interrupt Descriptor Table)`
354 and different interrupt controllers. The position of an interrupt in the IDT
359 for an IDT-like table that is separate from the NVIC vector table. The position
478 IDT section on x86.
/Zephyr-latest/doc/releases/
Drelease-notes-1.5.rst209 * ``ZEP-456` - doc: ``IDT security``` section disappeared
/Zephyr-latest/boards/qemu/x86/
Dqemu_x86_tiny.ld68 * On 32-bit x86, fake memory area for build-time IDT generation data.
/Zephyr-latest/arch/x86/
DKconfig206 int "IDT vector to use for IRQ offload"