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Searched refs:FIELD_GET (Results 1 – 25 of 92) sorted by relevance

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/Zephyr-latest/drivers/flash/
Dflash_cadence_qspi_nor_ll.h41 #define CAD_QSPI_DELAY_CSSOT(x) (FIELD_GET(0xff, (x)) << 0)
42 #define CAD_QSPI_DELAY_CSEOT(x) (FIELD_GET(0xff, (x)) << 8)
43 #define CAD_QSPI_DELAY_CSDADS(x) (FIELD_GET(0xff, (x)) << 16)
44 #define CAD_QSPI_DELAY_CSDA(x) (FIELD_GET(0xff, (x)) << 24)
53 #define CAD_QSPI_DEV_OPCODE(x) (FIELD_GET(0xff, (x)) << 0)
54 #define CAD_QSPI_DEV_INST_TYPE(x) (FIELD_GET(0x03, (x)) << 8)
55 #define CAD_QSPI_DEV_ADDR_TYPE(x) (FIELD_GET(0x03, (x)) << 12)
56 #define CAD_QSPI_DEV_DATA_TYPE(x) (FIELD_GET(0x03, (x)) << 16)
57 #define CAD_QSPI_DEV_MODE_BIT(x) (FIELD_GET(0x01, (x)) << 20)
58 #define CAD_QSPI_DEV_DUMMY_CLK_CYCLE(x) (FIELD_GET(0x0f, (x)) << 24)
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Dflash_cadence_nand_ll.h18 #define CNF_GET_INIT_COMP(x) (FIELD_GET(BIT(9), x))
19 #define CNF_GET_INIT_FAIL(x) (FIELD_GET(BIT(10), x))
20 #define CNF_GET_CTRL_BUSY(x) (FIELD_GET(BIT(8), x))
21 #define GET_PAGE_SIZE(x) (FIELD_GET(GENMASK(15, 0), x))
22 #define GET_PAGES_PER_BLOCK(x) (FIELD_GET(GENMASK(15, 0), x))
23 #define GET_SPARE_SIZE(x) (FIELD_GET(GENMASK(31, 16), x))
24 #define ONFI_TIMING_MODE_SDR(x) (FIELD_GET(GENMASK(15, 0), x))
25 #define ONFI_TIMING_MODE_NVDDR(x) (FIELD_GET(GENMASK(31, 15), x))
28 #define CNF_GET_NLUNS(x) (FIELD_GET(GENMASK(7, 0), x))
29 #define CNF_GET_DEV_TYPE(x) (FIELD_GET(GENMASK(31, 30), x))
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/Zephyr-latest/drivers/dai/intel/dmic/
Ddmic_nhlt.c98 fir_length_a = FIELD_GET(FIR_CONFIG_FIR_LENGTH, pdm_cfg->fir_config[0].fir_config) + 1; in dai_dmic_configure_coeff()
99 fir_length_b = FIELD_GET(FIR_CONFIG_FIR_LENGTH, pdm_cfg->fir_config[1].fir_config) + 1; in dai_dmic_configure_coeff()
135 p_mcic = FIELD_GET(CIC_CONFIG_COMB_COUNT, val) + 1; in dai_nhlt_get_clock_div()
138 p_clkdiv = FIELD_GET(MIC_CONTROL_PDM_CLKDIV, val) + 2; in dai_nhlt_get_clock_div()
144 p_mfir = FIELD_GET(FIR_CONFIG_FIR_DECIMATION, val) + 1; in dai_nhlt_get_clock_div()
191 mic_swap = FIELD_GET(MIC_CONTROL_CLK_EDGE, dai_dmic_read( in dai_ipm_source_to_enable()
214 switch (FIELD_GET(OUTCONTROL_OF, outcontrol_val)) { in dai_nhlt_dmic_dai_params_get()
229 num_pdm = FIELD_GET(OUTCONTROL_IPM, outcontrol_val); in dai_nhlt_dmic_dai_params_get()
236 stereo_pdm = FIELD_GET(OUTCONTROL_IPM_SOURCE_MODE, outcontrol_val); in dai_nhlt_dmic_dai_params_get()
244 source_pdm = FIELD_GET(OUTCONTROL_IPM_SOURCE_1, outcontrol_val); in dai_nhlt_dmic_dai_params_get()
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/Zephyr-latest/drivers/watchdog/
Dwdt_dw.h377 return FIELD_GET(WDT_TORR_TOP, sys_read32(base + WDT_TORR)); in dw_wdt_timeout_period_get()
500 return FIELD_GET(WDT_CNT_WIDTH, sys_read32(base + WDT_COMP_PARAM_1)) + 16; in dw_wdt_cnt_width_get()
514 return FIELD_GET(WDT_DFLT_TOP_INIT, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_dflt_timeout_period_init_get()
529 return FIELD_GET(WDT_DFLT_TOP, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_dflt_timeout_period_get()
540 return FIELD_GET(WDT_DFLT_RPL, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_dflt_rpl_get()
554 return FIELD_GET(APB_DATA_WIDTH, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_apb_data_width_get()
569 return FIELD_GET(WDT_PAUSE, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_pause_get()
585 return FIELD_GET(WDT_USE_FIX_TOP, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_use_fix_timeout_period_get()
599 return FIELD_GET(WDT_HC_TOP, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_hc_timeout_period_get()
611 return FIELD_GET(WDT_HC_RPL, sys_read32(base + WDT_COMP_PARAM_1)); in dw_wdt_hc_reset_pulse_length_get()
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Dwdt_intel_adsp.h151 return FIELD_GET(DSPCxWDTIPPTR_PTR, sys_read32(base + DSPCxWDTIPPTR + DSPBRx_OFFSET(core))); in intel_adsp_wdt_pointer_get()
164 return FIELD_GET(DSPCxWDTIPPTR_VER, sys_read32(base + DSPCxWDTIPPTR + DSPBRx_OFFSET(core))); in intel_adsp_wdt_version_get()
/Zephyr-latest/subsys/fs/zms/
Dzms_priv.h24 #define SECTOR_NUM(x) FIELD_GET(ADDR_SECT_MASK, x)
25 #define SECTOR_OFFSET(x) FIELD_GET(ADDR_OFFS_MASK, x)
37 #define ZMS_GET_VERSION(x) FIELD_GET(ZMS_VERSION_MASK, x)
41 #define ZMS_GET_MAGIC_NUMBER(x) FIELD_GET(ZMS_MAGIC_NUMBER_MASK, x)
/Zephyr-latest/soc/silabs/common/
Dpinctrl_soc.h70 FIELD_GET(SILABS_PINCTRL_PERIPH_BASE_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
71 .port = FIELD_GET(SILABS_PINCTRL_GPIO_PORT_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
72 .pin = FIELD_GET(SILABS_PINCTRL_GPIO_PIN_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
74 (FIELD_GET(SILABS_PINCTRL_HAVE_EN_MASK, DT_PROP_BY_IDX(node, prop, idx)) \
75 ? FIELD_GET(SILABS_PINCTRL_EN_BIT_MASK, DT_PROP_BY_IDX(node, prop, idx)) \
77 .route_offset = FIELD_GET(SILABS_PINCTRL_ROUTE_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
/Zephyr-latest/drivers/sensor/adi/adltc2990/
Dadltc2990_emul.c84 if (FIELD_GET(I2C_MSG_READ, msgs->flags)) { in adltc2990_emul_transfer_i2c()
94 bool is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1; in adltc2990_emul_transfer_i2c()
95 bool is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1; in adltc2990_emul_transfer_i2c()
100 is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1; in adltc2990_emul_transfer_i2c()
101 is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1; in adltc2990_emul_transfer_i2c()
/Zephyr-latest/include/zephyr/drivers/mfd/
Dmax31790.h54 FIELD_GET(GENMASK(MAX37190_FANXDYNAMICS_SPEEDRANGE_LENGTH + \
60 FIELD_GET(GENMASK(MAX37190_FANXDYNAMICS_SPEEDRANGE_LENGTH + \
65 FIELD_GET(GENMASK(MAX37190_FANXDYNAMICS_PWMRATEOFCHANGE_LENGTH + \
/Zephyr-latest/include/zephyr/bluetooth/classic/
Da2dp_codec_sbc.h75 #define BT_A2DP_SBC_MEDIA_HDR_NUM_FRAMES_GET(hdr) FIELD_GET(GENMASK(3, 0), (hdr))
77 #define BT_A2DP_SBC_MEDIA_HDR_L_GET(hdr) FIELD_GET(BIT(5), (hdr))
79 #define BT_A2DP_SBC_MEDIA_HDR_S_GET(hdr) FIELD_GET(BIT(6), (hdr))
81 #define BT_A2DP_SBC_MEDIA_HDR_F_GET(hdr) FIELD_GET(BIT(7), (hdr))
/Zephyr-latest/drivers/ethernet/
Doa_tc6.c272 tc6->exst = FIELD_GET(OA_DATA_FTR_EXST, ftr); in oa_tc6_update_status()
273 tc6->sync = FIELD_GET(OA_DATA_FTR_SYNC, ftr); in oa_tc6_update_status()
274 tc6->rca = FIELD_GET(OA_DATA_FTR_RCA, ftr); in oa_tc6_update_status()
275 tc6->txc = FIELD_GET(OA_DATA_FTR_TXC, ftr); in oa_tc6_update_status()
375 if (!FIELD_GET(OA_DATA_FTR_SYNC, ftr)) { in oa_tc6_read_chunks()
380 if (!FIELD_GET(OA_DATA_FTR_DV, ftr)) { in oa_tc6_read_chunks()
385 sbo = FIELD_GET(OA_DATA_FTR_SWO, ftr) * sizeof(uint32_t); in oa_tc6_read_chunks()
386 ebo = FIELD_GET(OA_DATA_FTR_EBO, ftr) + 1; in oa_tc6_read_chunks()
388 if (FIELD_GET(OA_DATA_FTR_SV, ftr)) { in oa_tc6_read_chunks()
394 if (!(FIELD_GET(OA_DATA_FTR_EV, ftr) && (ebo <= sbo))) { in oa_tc6_read_chunks()
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/Zephyr-latest/subsys/bluetooth/host/classic/
Davctp_internal.h40 #define BT_AVCTP_HDR_GET_TRANSACTION_LABLE(hdr) FIELD_GET(GENMASK(7, 4), ((hdr)->byte0))
44 #define BT_AVCTP_HDR_GET_PACKET_TYPE(hdr) FIELD_GET(GENMASK(3, 2), ((hdr)->byte0))
46 #define BT_AVCTP_HDR_GET_CR(hdr) FIELD_GET(BIT(1), ((hdr)->byte0))
51 #define BT_AVCTP_HDR_GET_IPID(hdr) FIELD_GET(BIT(0), ((hdr)->byte0))
Davrcp_internal.h68 #define BT_AVRCP_HDR_GET_CTYPE(hdr) FIELD_GET(GENMASK(3, 0), ((hdr)->byte0))
74 #define BT_AVRCP_HDR_GET_SUBUNIT_ID(hdr) FIELD_GET(GENMASK(2, 0), ((hdr)->byte1))
80 #define BT_AVRCP_HDR_GET_SUBUNIT_TYPE(hdr) FIELD_GET(GENMASK(7, 3), ((hdr)->byte1))
/Zephyr-latest/drivers/bbram/
Dbbram_microchip_mcp7940n_emul.c49 if (FIELD_GET(I2C_MSG_READ, msgs->flags)) { in mcp7940n_emul_transfer_i2c()
59 bool is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1; in mcp7940n_emul_transfer_i2c()
60 bool is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1; in mcp7940n_emul_transfer_i2c()
65 is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1; in mcp7940n_emul_transfer_i2c()
66 is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1; in mcp7940n_emul_transfer_i2c()
/Zephyr-latest/drivers/sensor/asahi_kasei/akm09918c/
Dakm09918c_emul.c66 if (FIELD_GET(AKM09918C_CNTL3_SRST, value) == 1) { in akm09918c_emul_handle_write()
85 if (FIELD_GET(I2C_MSG_READ, msgs->flags)) { in akm09918c_emul_transfer_i2c()
95 bool is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1; in akm09918c_emul_transfer_i2c()
96 bool is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1; in akm09918c_emul_transfer_i2c()
101 is_read = FIELD_GET(I2C_MSG_READ, msgs->flags) == 1; in akm09918c_emul_transfer_i2c()
102 is_stop = FIELD_GET(I2C_MSG_STOP, msgs->flags) == 1; in akm09918c_emul_transfer_i2c()
/Zephyr-latest/drivers/charger/
Dcharger_bq24190.c83 v = FIELD_GET(BQ24190_REG_POC_CHG_CONFIG_MASK, v); in bq24190_charger_get_charge_type()
93 v = FIELD_GET(BQ24190_REG_CCC_FORCE_20PCT_MASK, v); in bq24190_charger_get_charge_type()
180 pg_stat = FIELD_GET(BQ24190_REG_SS_PG_STAT_MASK, pg_stat); in bq24190_charger_get_online()
187 batfet_disable = FIELD_GET(BQ24190_REG_MOC_BATFET_DISABLE_MASK, batfet_disable); in bq24190_charger_get_online()
209 chrg_fault = FIELD_GET(BQ24190_REG_F_CHRG_FAULT_MASK, chrg_fault); in bq24190_charger_get_status()
226 ss_reg = FIELD_GET(BQ24190_REG_SS_CHRG_STAT_MASK, ss_reg); in bq24190_charger_get_status()
262 v = FIELD_GET(BQ24190_REG_CCC_ICHG_MASK, v); in bq24190_charger_get_constant_charge_current()
292 v = FIELD_GET(BQ24190_REG_PCTCC_IPRECHG_MASK, v); in bq24190_charger_get_precharge_current()
314 v = FIELD_GET(BQ24190_REG_PCTCC_ITERM_MASK, v); in bq24190_charger_get_charge_term_current()
332 v = FIELD_GET(BQ24190_REG_CVC_VREG_MASK, v); in bq24190_get_constant_charge_voltage()
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/Zephyr-latest/soc/infineon/cat1a/psoc6_legacy/
Dpinctrl_soc.h75 #define CAT1_PINMUX_GET_PORT_NUM(pinmux) FIELD_GET(SOC_PINMUX_PORT_MASK, pinmux)
76 #define CAT1_PINMUX_GET_PIN_NUM(pinmux) FIELD_GET(SOC_PINMUX_PIN_MASK, pinmux)
77 #define CAT1_PINMUX_GET_HSIOM_FUNC(pinmux) FIELD_GET(SOC_PINMUX_HSIOM_MASK, pinmux)
/Zephyr-latest/drivers/sensor/tdk/icm42688/
Dicm42688_decoder.c211 if (FIELD_GET(FIFO_HEADER_20, pkt[0]) == 1) { in icm42688_read_temperature_from_packet()
216 if (FIELD_GET(FIFO_HEADER_ACCEL, pkt[0]) == 1 && in icm42688_read_temperature_from_packet()
217 FIELD_GET(FIFO_HEADER_GYRO, pkt[0]) == 1) { in icm42688_read_temperature_from_packet()
286 if (!is_accel && FIELD_GET(FIFO_HEADER_ACCEL, pkt[0]) == 1) { in icm42688_read_imu_from_packet()
292 if (FIELD_GET(FIFO_HEADER_20, pkt[0]) == 1) { in icm42688_read_imu_from_packet()
296 value = (value << 4) | FIELD_GET(mask, pkt[offset]); in icm42688_read_imu_from_packet()
366 const bool is_20b = FIELD_GET(FIFO_HEADER_20, buffer[0]) == 1; in icm42688_fifo_decode()
367 const bool has_accel = FIELD_GET(FIFO_HEADER_ACCEL, buffer[0]) == 1; in icm42688_fifo_decode()
368 const bool has_gyro = FIELD_GET(FIFO_HEADER_GYRO, buffer[0]) == 1; in icm42688_fifo_decode()
620 bool is_20b = FIELD_GET(FIFO_HEADER_20, buffer[0]); in icm42688_decoder_get_frame_count()
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Dicm42688_spi.c69 uint8_t address = FIELD_GET(REG_ADDRESS_MASK, reg); in icm42688_spi_read()
95 uint8_t address = FIELD_GET(REG_ADDRESS_MASK, reg); in icm42688_spi_single_write()
/Zephyr-latest/subsys/rtio/
Drtio_executor.c40 if (FIELD_GET(RTIO_SQE_CANCELED, iodev_sqe->sqe.flags)) { in rtio_iodev_submit()
124 if (curr->sqe.op == RTIO_OP_RX && FIELD_GET(RTIO_SQE_MEMPOOL_BUFFER, curr->sqe.flags)) { in rtio_executor_handle_multishot()
144 const bool is_multishot = FIELD_GET(RTIO_SQE_MULTISHOT, iodev_sqe->sqe.flags) == 1; in rtio_executor_done()
145 const bool is_canceled = FIELD_GET(RTIO_SQE_CANCELED, iodev_sqe->sqe.flags) == 1; in rtio_executor_done()
164 if (!is_canceled && FIELD_GET(RTIO_SQE_NO_RESPONSE, sqe_flags) == 0) { in rtio_executor_done()
/Zephyr-latest/drivers/clock_control/
Dclock_control_ast10x0.c107 if (FIELD_GET(I3C_CLK_SRC_SEL, reg) == I3C_CLK_SRC_HPLL) { in aspeed_clock_control_get_rate()
112 clk_div = I3C_CLK_DIV_REG_TO_VAL(FIELD_GET(I3C_CLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
118 clk_div = HCLK_DIV_REG_TO_VAL(FIELD_GET(HCLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
124 clk_div = PCLK_DIV_REG_TO_VAL(FIELD_GET(PCLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
/Zephyr-latest/include/zephyr/drivers/i3c/
Dccc.h624 FIELD_GET(I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK, (status))
638 FIELD_GET(I3C_CCC_GETSTATUS_NUM_INT_MASK, (status))
808 FIELD_GET(I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_MASK, (maxwr))
825 FIELD_GET(I3C_CCC_GETMXDS_MAXRD_TSCO_MASK, (maxrd))
839 FIELD_GET(I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_MASK, (maxrd))
856 FIELD_GET(I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_MASK, (chrdly1))
1048 FIELD_GET(I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK, (getcaps2))
1066 FIELD_GET(I3C_CCC_GETCAPS2_SPEC_VER_MASK, (getcaps2))
1194 FIELD_GET(I3C_CCC_GETCAPS_VTCAP1_VITRUAL_TARGET_TYPE_MASK, (vtcap1))
1220 FIELD_GET(I3C_CCC_GETCAPS_VTCAP2_INTERRUPT_REQUESTS_MASK, (vtcap2))
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/Zephyr-latest/include/zephyr/fs/
Dlittlefs.h26 #define FS_LITTLEFS_DISK_VERSION_MAJOR_GET(disk_version) FIELD_GET(GENMASK(31, 16), disk_version)
34 #define FS_LITTLEFS_DISK_VERSION_MINOR_GET(disk_version) FIELD_GET(GENMASK(15, 0), disk_version)
/Zephyr-latest/drivers/pinctrl/
Dpinctrl_ene_kb1200.c47 #define ENE_KB1200_PINMUX_PIN(p) FIELD_GET(GENMASK(4, 0), p)
48 #define ENE_KB1200_PINMUX_PORT(p) FIELD_GET(GENMASK(7, 5), p)
49 #define ENE_KB1200_PINMUX_FUNC(p) FIELD_GET(GENMASK(11, 8), p)
50 #define ENE_KB1200_PINMUX_PORT_PIN(p) FIELD_GET(GENMASK(7, 0), p)
/Zephyr-latest/drivers/sensor/tsic_xx6/
Dtsic_xx6.c132 data_parity ^= FIELD_GET(BIT(i), data); in tsic_xx6_parity_check()
143 uint8_t data_msb = FIELD_GET(GENMASK(frame_data_bit_high, FRAME_DATA_BIT_8), frame); in tsic_xx6_get_data_bits()
144 uint8_t data_lsb = FIELD_GET(GENMASK(FRAME_DATA_BIT_7, FRAME_DATA_BIT_0), frame); in tsic_xx6_get_data_bits()
145 bool parity_msb = FIELD_GET(BIT(FRAME_PARITIY_BIT_MSB), frame); in tsic_xx6_get_data_bits()
187 if (FIELD_GET(BIT(FRAME_READY_BIT), frame) == 0) { in tsic_xx6_sample_fetch()

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