Searched refs:ENET_QOS_REG_PREP (Results 1 – 3 of 3) sorted by relevance
/Zephyr-latest/drivers/ethernet/eth_nxp_enet_qos/ |
D | eth_nxp_enet_qos_mac.c | 125 ENET_QOS_REG_PREP(DMA_CH_DMA_CHX_TXDESC_TAIL_PTR, TDTP, in eth_nxp_enet_qos_tx() 293 base->DMA_MODE |= ENET_QOS_REG_PREP(DMA_MODE, SWR, 0b1); in enet_qos_dma_reset() 331 ENET_QOS_REG_PREP(DMA_CH_DMA_CHX_TX_CTRL, TxPBL, 0b1); in enet_qos_dma_config_init() 333 ENET_QOS_REG_PREP(DMA_CH_DMA_CHX_RX_CTRL, RxPBL, 0b1); in enet_qos_dma_config_init() 340 ENET_QOS_REG_PREP(MTL_QUEUE_MTL_TXQX_OP_MODE, FTQ, 0b1); in enet_qos_mtl_config_init() 351 ENET_QOS_REG_PREP(MTL_QUEUE_MTL_TXQX_OP_MODE, TQS, 0b111) | in enet_qos_mtl_config_init() 353 ENET_QOS_REG_PREP(MTL_QUEUE_MTL_TXQX_OP_MODE, TXQEN, 0b10); in enet_qos_mtl_config_init() 358 ENET_QOS_REG_PREP(MTL_QUEUE_MTL_RXQX_OP_MODE, RQS, 0b111) | in enet_qos_mtl_config_init() 360 ENET_QOS_REG_PREP(MTL_QUEUE_MTL_RXQX_OP_MODE, FUP, 0b1); in enet_qos_mtl_config_init() 368 ENET_QOS_REG_PREP(MAC_ADDRESS0_HIGH, ADDRHI, in enet_qos_mac_config_init() [all …]
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/Zephyr-latest/drivers/mdio/ |
D | mdio_nxp_enet_qos.c | 58 ENET_QOS_REG_PREP(MAC_MDIO_DATA, GD, mdio->write_data); in do_transaction() 69 ENET_QOS_REG_PREP(MAC_MDIO_ADDRESS, GOC_1, goc_1_code) | in do_transaction() 70 ENET_QOS_REG_PREP(MAC_MDIO_ADDRESS, GOC_0, 0b1) | in do_transaction() 72 ENET_QOS_REG_PREP(MAC_MDIO_ADDRESS, PA, mdio->portaddr) | in do_transaction() 74 ENET_QOS_REG_PREP(MAC_MDIO_ADDRESS, RDA, mdio->regaddr); in do_transaction() 78 ENET_QOS_REG_PREP(MAC_MDIO_ADDRESS, GB, 0b1); in do_transaction() 189 ENET_QOS_REG_PREP(MAC_MDIO_ADDRESS, CR, divider); in nxp_enet_qos_mdio_init()
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/Zephyr-latest/include/zephyr/drivers/ethernet/ |
D | eth_nxp_enet_qos.h | 41 #define ENET_QOS_REG_PREP(reg, field, val) FIELD_PREP(_ENET_QOS_REG_MASK(reg, field), val) macro
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