Searched refs:ENET_QOS_REG_GET (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-latest/include/zephyr/drivers/ethernet/ |
| D | eth_nxp_enet_qos.h | 33 #define ENET_QOS_REG_GET(reg, field, val) FIELD_GET(_ENET_QOS_REG_MASK(reg, field), val) macro
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| /Zephyr-latest/drivers/mdio/ |
| D | mdio_nxp_enet_qos.c | 44 return ENET_QOS_REG_GET(MAC_MDIO_ADDRESS, GB, val); in check_busy()
100 ENET_QOS_REG_GET(MAC_MDIO_DATA, GD, val); in do_transaction()
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| /Zephyr-latest/drivers/ethernet/eth_nxp_enet_qos/ |
| D | eth_nxp_enet_qos_mac.c | 261 if (ENET_QOS_REG_GET(DMA_INTERRUPT_STATUS, DC0IS, dma_interrupts)) { in eth_nxp_enet_qos_mac_isr()
262 if (ENET_QOS_REG_GET(DMA_CH_DMA_CHX_STAT, TI, dma_ch0_interrupts)) { in eth_nxp_enet_qos_mac_isr()
265 if (ENET_QOS_REG_GET(DMA_CH_DMA_CHX_STAT, RI, dma_ch0_interrupts)) { in eth_nxp_enet_qos_mac_isr()
297 while (ENET_QOS_REG_GET(DMA_MODE, SWR, base->DMA_MODE)) { in enet_qos_dma_reset()
312 if (!ENET_QOS_REG_GET(DMA_MODE, SWR, base->DMA_MODE)) { in enet_qos_dma_reset()
343 while (ENET_QOS_REG_GET(MTL_QUEUE_MTL_TXQX_OP_MODE, FTQ, in enet_qos_mtl_config_init()
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