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Searched refs:DT_PROP (Results 1 – 25 of 443) sorted by relevance

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/Zephyr-latest/soc/microchip/mec/common/
Dpinctrl_soc.h32 #define Z_PINCTRL_MCHP_XEC_PINMUX_INIT(node_id) (uint32_t)(DT_PROP(node_id, pinmux))
36 ((DT_PROP(node_id, bias_disable) << MCHP_XEC_NO_PUD_POS) | \
37 (DT_PROP(node_id, bias_pull_down) << MCHP_XEC_PD_POS) | \
38 (DT_PROP(node_id, bias_pull_up) << MCHP_XEC_PU_POS) | \
39 (DT_PROP(node_id, drive_push_pull) << MCHP_XEC_PUSH_PULL_POS) | \
40 (DT_PROP(node_id, drive_open_drain) << MCHP_XEC_OPEN_DRAIN_POS) | \
41 (DT_PROP(node_id, output_disable) << MCHP_XEC_OUT_DIS_POS) | \
42 (DT_PROP(node_id, output_enable) << MCHP_XEC_OUT_EN_POS) | \
43 (DT_PROP(node_id, output_high) << MCHP_XEC_OUT_HI_POS) | \
44 (DT_PROP(node_id, output_low) << MCHP_XEC_OUT_LO_POS) | \
[all …]
/Zephyr-latest/modules/hal_silabs/simplicity_sdk/config/
Dsl_clock_manager_oscillator_config.h17 #define SL_CLOCK_MANAGER_HFXO_FREQ DT_PROP(DT_NODELABEL(hfxo), clock_frequency)
18 #define SL_CLOCK_MANAGER_HFXO_CTUNE DT_PROP(DT_NODELABEL(hfxo), ctune)
19 #define SL_CLOCK_MANAGER_HFXO_PRECISION DT_PROP(DT_NODELABEL(hfxo), precision)
26 #define SL_CLOCK_MANAGER_LFXO_CTUNE DT_PROP(DT_NODELABEL(lfxo), ctune)
27 #define SL_CLOCK_MANAGER_LFXO_PRECISION DT_PROP(DT_NODELABEL(lfxo), precision)
33 (DT_PROP(DT_NODELABEL(hfrcodpll), clock_frequency) < 1500000 ? 1000000U \
34 : DT_PROP(DT_NODELABEL(hfrcodpll), clock_frequency) < 3000000 ? 2000000U \
35 : DT_PROP(DT_NODELABEL(hfrcodpll), clock_frequency) < 5500000 ? 4000000U \
36 : DT_PROP(DT_NODELABEL(hfrcodpll), clock_frequency) < 10000000 ? 7000000U \
37 : DT_PROP(DT_NODELABEL(hfrcodpll), clock_frequency) < 14500000 ? 13000000U \
[all …]
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dpinctrl_soc.h52 ((0x2 & ((!DT_PROP(node_id, bias_pull_down) && !DT_PROP(node_id, bias_pull_up)) << 1)) |\
53 (0x1 & ((!DT_PROP(node_id, bias_pull_down) && !DT_PROP(node_id, bias_pull_up)) << 0))) \
56 IF_ENABLED(DT_PROP(node_id, bias_pull_down), \
58 IF_ENABLED(DT_PROP(node_id, bias_pull_up), \
62 (DT_PROP(node_id, drive_open_drain) << MCUX_IMX_ODE_SHIFT) | \
63 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT)
66 (DT_PROP(node_id, bias_pull_up) << MCUX_IMX_PUS_SHIFT) | \
67 ((DT_PROP(node_id, bias_pull_up) || DT_PROP(node_id, bias_pull_down)) \
71 (DT_PROP(node_id, drive_open_drain) << MCUX_IMX_ODE_SHIFT) | \
72 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT)
[all …]
/Zephyr-latest/soc/silabs/common/
Dpinctrl_soc.h47 (DT_PROP(node, drive_push_pull) ? (4 + DT_PROP(node, silabs_alternate_port_control)) \
48 : DT_PROP(node, drive_open_source) ? (6 + DT_PROP(node, bias_pull_down)) \
49 : DT_PROP(node, drive_open_drain) \
50 ? (8 + DT_PROP(node, silabs_input_filter) + 2 * DT_PROP(node, bias_pull_up) + \
51 4 * DT_PROP(node, silabs_alternate_port_control)) \
52 : DT_PROP(node, input_enable) \
53 ? ((DT_PROP(node, bias_pull_down) || DT_PROP(node, bias_pull_up)) \
54 ? (2 + DT_PROP(node, silabs_input_filter)) \
59 (DT_PROP(node, drive_push_pull) ? DT_PROP(node, output_high) \
60 : DT_PROP(node, drive_open_drain) ? 1 \
[all …]
/Zephyr-latest/soc/st/stm32/common/
Dpinctrl_soc.h44 #define Z_PINCTRL_STM32_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux)
65 (((STM32_NO_PULL * DT_PROP(node_id, bias_disable)) << STM32_PUPD_SHIFT) | \
66 ((STM32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << STM32_PUPD_SHIFT) | \
67 ((STM32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << STM32_PUPD_SHIFT) | \
68 ((STM32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << STM32_CNF_OUT_0_SHIFT) | \
69 ((STM32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << STM32_CNF_OUT_0_SHIFT) | \
70 ((STM32_OUTPUT_LOW * DT_PROP(node_id, output_low)) << STM32_ODR_SHIFT) | \
71 ((STM32_OUTPUT_HIGH * DT_PROP(node_id, output_high)) << STM32_ODR_SHIFT) | \
80 (((STM32_NO_PULL * DT_PROP(node_id, bias_disable)) << STM32_PUPDR_SHIFT) | \
81 ((STM32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << STM32_PUPDR_SHIFT) | \
[all …]
/Zephyr-latest/include/zephyr/drivers/stepper/
Dstepper_trinamic.h85 BUILD_ASSERT(IN_RANGE(DT_PROP(node, vstart), TMC_RAMP_VSTART_MIN, \
88 BUILD_ASSERT(IN_RANGE(DT_PROP(node, v1), TMC_RAMP_V1_MIN, \
91 BUILD_ASSERT(IN_RANGE(DT_PROP(node, vmax), TMC_RAMP_VMAX_MIN, \
94 BUILD_ASSERT(IN_RANGE(DT_PROP(node, a1), TMC_RAMP_A1_MIN, \
97 BUILD_ASSERT(IN_RANGE(DT_PROP(node, amax), TMC_RAMP_AMAX_MIN, \
100 BUILD_ASSERT(IN_RANGE(DT_PROP(node, d1), TMC_RAMP_D1_MIN, \
103 BUILD_ASSERT(IN_RANGE(DT_PROP(node, dmax), TMC_RAMP_DMAX_MIN, \
106 BUILD_ASSERT(IN_RANGE(DT_PROP(node, vstop), TMC_RAMP_VSTOP_MIN, \
109 BUILD_ASSERT(IN_RANGE(DT_PROP(node, tzerowait), TMC_RAMP_TZEROWAIT_MIN, \
112 BUILD_ASSERT(IN_RANGE(DT_PROP(node, vcoolthrs), TMC_RAMP_VCOOLTHRS_MIN, \
[all …]
/Zephyr-latest/soc/ene/kb1200/
Dpinctrl_soc.h21 #define Z_PINCTRL_ENE_KB1200_PINMUX_INIT(node_id) (uint32_t)(DT_PROP(node_id, pinmux))
24 ((DT_PROP(node_id, bias_disable) << ENE_KB1200_NO_PUD_POS) | \
25 (DT_PROP(node_id, bias_pull_down) << ENE_KB1200_PD_POS) | \
26 (DT_PROP(node_id, bias_pull_up) << ENE_KB1200_PU_POS) | \
27 (DT_PROP(node_id, drive_push_pull) << ENE_KB1200_PUSH_PULL_POS) | \
28 (DT_PROP(node_id, drive_open_drain) << ENE_KB1200_OPEN_DRAIN_POS) | \
29 (DT_PROP(node_id, output_disable) << ENE_KB1200_OUT_DIS_POS) | \
30 (DT_PROP(node_id, output_enable) << ENE_KB1200_OUT_EN_POS) | \
31 (DT_PROP(node_id, output_high) << ENE_KB1200_OUT_HI_POS) | \
32 (DT_PROP(node_id, output_low) << ENE_KB1200_OUT_LO_POS) | \
[all …]
/Zephyr-latest/soc/nxp/imxrt/imxrt118x/
Dpinctrl_soc.h50 ((0x2 & ((!DT_PROP(node_id, bias_pull_down) && !DT_PROP(node_id, bias_pull_up)) << 1)) |\
51 (0x1 & ((!DT_PROP(node_id, bias_pull_down) && !DT_PROP(node_id, bias_pull_up)) << 0))) \
54 IF_ENABLED(DT_PROP(node_id, bias_pull_down), \
56 IF_ENABLED(DT_PROP(node_id, bias_pull_up), \
60 (DT_PROP(node_id, drive_open_drain) << MCUX_IMX_ODE_SHIFT) | \
61 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT)
64 (DT_PROP(node_id, bias_pull_up) << MCUX_IMX_PUS_SHIFT) | \
65 ((DT_PROP(node_id, bias_pull_up) || DT_PROP(node_id, bias_pull_down)) \
69 (DT_PROP(node_id, drive_open_drain) << MCUX_IMX_ODE_SHIFT) | \
70 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT)
[all …]
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h71 #define STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler)
72 #define STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler)
73 #define STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler)
74 #define STM32_APB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb3_prescaler)
75 #define STM32_APB5_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb5_prescaler)
76 #define STM32_APB7_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb7_prescaler)
77 #define STM32_AHB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
78 #define STM32_AHB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
80 #define STM32_CPU1_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
81 #define STM32_CPU2_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu2_prescaler)
[all …]
/Zephyr-latest/soc/ti/simplelink/cc13x2_cc26x2/
Dpinctrl_soc.h22 (DT_PROP(node_id, bias_pull_up) * IOC_IOPULL_UP | \
23 DT_PROP(node_id, bias_pull_down) * IOC_IOPULL_DOWN | \
24 DT_PROP(node_id, bias_disable) * IOC_NO_IOPULL | \
25 DT_PROP(node_id, drive_open_drain) * IOC_IOMODE_OPEN_DRAIN_NORMAL | \
26 DT_PROP(node_id, drive_open_source) * IOC_IOMODE_OPEN_SRC_NORMAL | \
27 (DT_PROP(node_id, drive_strength) >> 2) << IOC_IOCFG0_IOCURR_S | \
28 DT_PROP(node_id, input_enable) * IOC_INPUT_ENABLE | \
29 DT_PROP(node_id, input_schmitt_enable) * IOC_HYST_ENABLE | \
30 DT_PROP(node_id, ti_input_edge_detect))
/Zephyr-latest/drivers/display/
Ddisplay_ili9342c.h71 .gamset = DT_PROP(DT_INST(n, ilitek_ili9342c), gamset), \
72 .ifmode = DT_PROP(DT_INST(n, ilitek_ili9342c), ifmode), \
73 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9342c), frmctr1), \
74 .invtr = DT_PROP(DT_INST(n, ilitek_ili9342c), invtr), \
75 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9342c), disctrl), \
76 .etmod = DT_PROP(DT_INST(n, ilitek_ili9342c), etmod), \
77 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9342c), pwctrl1), \
78 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9342c), pwctrl2), \
79 .pwctrl3 = DT_PROP(DT_INST(n, ilitek_ili9342c), pwctrl3), \
80 .vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9342c), vmctrl1), \
[all …]
Ddisplay_ili9806e_dsi.h12 #define LCD_HTIMMING_SYNC DT_PROP(LCD_TIMINGS_NODE, hsync_len)
13 #define LCD_HTIMMING_BACK_PORCH DT_PROP(LCD_TIMINGS_NODE, hback_porch)
14 #define LCD_HTIMMING_FRONT_PORCH DT_PROP(LCD_TIMINGS_NODE, hfront_porch)
15 #define LCD_HACTIVE_LINE DT_PROP(DT_NODELABEL(zephyr_lcdif), width)
19 #define LCD_VTIMMING_SYNC DT_PROP(LCD_TIMINGS_NODE, vsync_len)
20 #define LCD_VTIMMING_BACK_PORCH DT_PROP(LCD_TIMINGS_NODE, vback_porch)
21 #define LCD_VTIMMING_FRONT_PORCH DT_PROP(LCD_TIMINGS_NODE, vfront_porch)
22 #define LCD_VACTIVE_LINE DT_PROP(DT_NODELABEL(zephyr_lcdif), height)
Ddisplay_ili9340.h54 .gamset = DT_PROP(DT_INST(n, ilitek_ili9340), gamset), \
55 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9340), frmctr1), \
56 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9340), disctrl), \
57 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9340), pwctrl1), \
58 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9340), pwctrl2), \
59 .vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9340), vmctrl1), \
60 .vmctrl2 = DT_PROP(DT_INST(n, ilitek_ili9340), vmctrl2), \
61 .pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9340), pgamctrl), \
62 .ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9340), ngamctrl), \
Ddisplay_ili9341.h125 .gamset = DT_PROP(DT_INST(n, ilitek_ili9341), gamset), \
126 .ifmode = DT_PROP(DT_INST(n, ilitek_ili9341), ifmode), \
127 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9341), frmctr1), \
128 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9341), disctrl), \
129 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl1), \
130 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl2), \
131 .vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), vmctrl1), \
132 .vmctrl2 = DT_PROP(DT_INST(n, ilitek_ili9341), vmctrl2), \
133 .pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pgamctrl), \
134 .ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9341), ngamctrl), \
[all …]
/Zephyr-latest/soc/espressif/esp32/
Dpinctrl_soc.h43 (((ESP32_NO_PULL * DT_PROP(node_id, bias_disable)) << ESP32_PIN_BIAS_SHIFT) | \
44 ((ESP32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << ESP32_PIN_BIAS_SHIFT) | \
45 ((ESP32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << ESP32_PIN_BIAS_SHIFT) | \
46 ((ESP32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << ESP32_PIN_DRV_SHIFT) | \
47 ((ESP32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << ESP32_PIN_DRV_SHIFT) | \
48 ((ESP32_PIN_OUT_HIGH * DT_PROP(node_id, output_high)) << ESP32_PIN_OUT_SHIFT) | \
49 ((ESP32_PIN_OUT_LOW * DT_PROP(node_id, output_low)) << ESP32_PIN_OUT_SHIFT) | \
50 ((ESP32_PIN_OUT_EN * DT_PROP(node_id, output_enable)) << ESP32_PIN_EN_DIR_SHIFT) | \
51 ((ESP32_PIN_IN_EN * DT_PROP(node_id, input_enable)) << ESP32_PIN_EN_DIR_SHIFT))
/Zephyr-latest/soc/espressif/esp32c2/
Dpinctrl_soc.h43 (((ESP32_NO_PULL * DT_PROP(node_id, bias_disable)) << ESP32_PIN_BIAS_SHIFT) | \
44 ((ESP32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << ESP32_PIN_BIAS_SHIFT) | \
45 ((ESP32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << ESP32_PIN_BIAS_SHIFT) | \
46 ((ESP32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << ESP32_PIN_DRV_SHIFT) | \
47 ((ESP32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << ESP32_PIN_DRV_SHIFT) | \
48 ((ESP32_PIN_OUT_HIGH * DT_PROP(node_id, output_high)) << ESP32_PIN_OUT_SHIFT) | \
49 ((ESP32_PIN_OUT_LOW * DT_PROP(node_id, output_low)) << ESP32_PIN_OUT_SHIFT) | \
50 ((ESP32_PIN_OUT_EN * DT_PROP(node_id, output_enable)) << ESP32_PIN_EN_DIR_SHIFT) | \
51 ((ESP32_PIN_IN_EN * DT_PROP(node_id, input_enable)) << ESP32_PIN_EN_DIR_SHIFT))
/Zephyr-latest/soc/espressif/esp32c3/
Dpinctrl_soc.h43 (((ESP32_NO_PULL * DT_PROP(node_id, bias_disable)) << ESP32_PIN_BIAS_SHIFT) | \
44 ((ESP32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << ESP32_PIN_BIAS_SHIFT) | \
45 ((ESP32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << ESP32_PIN_BIAS_SHIFT) | \
46 ((ESP32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << ESP32_PIN_DRV_SHIFT) | \
47 ((ESP32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << ESP32_PIN_DRV_SHIFT) | \
48 ((ESP32_PIN_OUT_HIGH * DT_PROP(node_id, output_high)) << ESP32_PIN_OUT_SHIFT) | \
49 ((ESP32_PIN_OUT_LOW * DT_PROP(node_id, output_low)) << ESP32_PIN_OUT_SHIFT) | \
50 ((ESP32_PIN_OUT_EN * DT_PROP(node_id, output_enable)) << ESP32_PIN_EN_DIR_SHIFT) | \
51 ((ESP32_PIN_IN_EN * DT_PROP(node_id, input_enable)) << ESP32_PIN_EN_DIR_SHIFT))
/Zephyr-latest/soc/espressif/esp32c6/
Dpinctrl_soc.h44 (((ESP32_NO_PULL * DT_PROP(node_id, bias_disable)) << ESP32_PIN_BIAS_SHIFT) | \
45 ((ESP32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << ESP32_PIN_BIAS_SHIFT) | \
46 ((ESP32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << ESP32_PIN_BIAS_SHIFT) | \
47 ((ESP32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << ESP32_PIN_DRV_SHIFT) | \
48 ((ESP32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << ESP32_PIN_DRV_SHIFT) | \
49 ((ESP32_PIN_OUT_HIGH * DT_PROP(node_id, output_high)) << ESP32_PIN_OUT_SHIFT) | \
50 ((ESP32_PIN_OUT_LOW * DT_PROP(node_id, output_low)) << ESP32_PIN_OUT_SHIFT) | \
51 ((ESP32_PIN_OUT_EN * DT_PROP(node_id, output_enable)) << ESP32_PIN_EN_DIR_SHIFT) | \
52 ((ESP32_PIN_IN_EN * DT_PROP(node_id, input_enable)) << ESP32_PIN_EN_DIR_SHIFT))
/Zephyr-latest/soc/espressif/esp32s2/
Dpinctrl_soc.h43 (((ESP32_NO_PULL * DT_PROP(node_id, bias_disable)) << ESP32_PIN_BIAS_SHIFT) | \
44 ((ESP32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << ESP32_PIN_BIAS_SHIFT) | \
45 ((ESP32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << ESP32_PIN_BIAS_SHIFT) | \
46 ((ESP32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << ESP32_PIN_DRV_SHIFT) | \
47 ((ESP32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << ESP32_PIN_DRV_SHIFT) | \
48 ((ESP32_PIN_OUT_HIGH * DT_PROP(node_id, output_high)) << ESP32_PIN_OUT_SHIFT) | \
49 ((ESP32_PIN_OUT_LOW * DT_PROP(node_id, output_low)) << ESP32_PIN_OUT_SHIFT) | \
50 ((ESP32_PIN_OUT_EN * DT_PROP(node_id, output_enable)) << ESP32_PIN_EN_DIR_SHIFT) | \
51 ((ESP32_PIN_IN_EN * DT_PROP(node_id, input_enable)) << ESP32_PIN_EN_DIR_SHIFT))
/Zephyr-latest/soc/espressif/esp32s3/
Dpinctrl_soc.h45 (((ESP32_NO_PULL * DT_PROP(node_id, bias_disable)) << ESP32_PIN_BIAS_SHIFT) | \
46 ((ESP32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << ESP32_PIN_BIAS_SHIFT) | \
47 ((ESP32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << ESP32_PIN_BIAS_SHIFT) | \
48 ((ESP32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << ESP32_PIN_DRV_SHIFT) | \
49 ((ESP32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << ESP32_PIN_DRV_SHIFT) | \
50 ((ESP32_PIN_OUT_HIGH * DT_PROP(node_id, output_high)) << ESP32_PIN_OUT_SHIFT) | \
51 ((ESP32_PIN_OUT_LOW * DT_PROP(node_id, output_low)) << ESP32_PIN_OUT_SHIFT) | \
52 ((ESP32_PIN_OUT_EN * DT_PROP(node_id, output_enable)) << ESP32_PIN_EN_DIR_SHIFT) | \
53 ((ESP32_PIN_IN_EN * DT_PROP(node_id, input_enable)) << ESP32_PIN_EN_DIR_SHIFT))
/Zephyr-latest/soc/nxp/lpc/lpc55xxx/
Dpinctrl_soc.h32 (IF_ENABLED(DT_PROP(node_id, bias_pull_down), (IOCON_PIO_MODE(0x1) |)) \
33 IF_ENABLED(DT_PROP(node_id, bias_pull_up), (IOCON_PIO_MODE(0x2) |)) \
34 IF_ENABLED(DT_PROP(node_id, drive_push_pull), (IOCON_PIO_MODE(0x3) |)) \
36 IOCON_PIO_INVERT(DT_PROP(node_id, nxp_invert)) | \
37 IOCON_PIO_DIGIMODE(!DT_PROP(node_id, nxp_analog_mode)) | \
38 IOCON_PIO_OD(DT_PROP(node_id, drive_open_drain)) | \
39 IOCON_PIO_ASW(DT_PROP(node_id, nxp_analog_mode)) | \
40 IOCON_PIO_ASW1(DT_PROP(node_id, nxp_analog_alt_mode)) | \
43 IOCON_PIO_ECS(DT_PROP(node_id, nxp_i2c_pullup)) | \
44 IOCON_PIO_EGP(!DT_PROP(node_id, nxp_i2c_mode)) | \
/Zephyr-latest/soc/ambiq/apollo3x/
Dpinctrl_soc.h57 DT_PROP(node_id, input_enable), \
59 DT_PROP(node_id, drive_push_pull), \
60 DT_PROP(node_id, drive_open_drain), \
61 DT_PROP(node_id, bias_high_impedance), \
62 DT_PROP(node_id, bias_pull_up), \
63 DT_PROP(node_id, bias_pull_down), \
65 DT_PROP(node_id, ambiq_iom_nce_module), \
66 DT_PROP(node_id, ambiq_iom_mspi), \
67 DT_PROP(node_id, ambiq_iom_num), \
/Zephyr-latest/soc/nxp/lpc/lpc11u6x/
Dpinctrl_soc.h23 (IF_ENABLED(DT_PROP(node_id, bias_pull_down), (IOCON_PIO_MODE(0x1) |)) \
24 IF_ENABLED(DT_PROP(node_id, bias_pull_up), (IOCON_PIO_MODE(0x2) |)) \
25 IF_ENABLED(DT_PROP(node_id, drive_push_pull), (IOCON_PIO_MODE(0x3) |)) \
26 IOCON_PIO_HYS(DT_PROP(node_id, input_schmitt_enable)) | \
27 IOCON_PIO_INVERT(DT_PROP(node_id, nxp_invert)) | \
28 IOCON_PIO_OD(DT_PROP(node_id, drive_open_drain)) | \
31 IOCON_PIO_ADMODE(!DT_PROP(node_id, nxp_analog_mode)) | \
32 IOCON_PIO_FILTER(DT_PROP(node_id, nxp_disable_analog_filter)) | \
33 IOCON_PIO_I2CMODE(!DT_PROP(node_id, nxp_i2c_mode)) | \
/Zephyr-latest/soc/nxp/imx/imx7d/
Dpinctrl_soc.h30 ((DT_PROP(node_id, input_schmitt_enable) << MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT) | \
31 IF_ENABLED(DT_PROP(node_id, bias_pull_up), (DT_ENUM_IDX(node_id, bias_pull_up_value) \
33 ((DT_PROP(node_id, bias_pull_down) | DT_PROP(node_id, bias_pull_up)) \
37 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT))
41 (IF_ENABLED(DT_PROP(node_id, bias_pull_up), (DT_ENUM_IDX(node_id, bias_pull_up_value) \
43 IF_ENABLED(DT_PROP(node_id, bias_pull_down), (DT_ENUM_IDX(node_id, bias_pull_down_value)\
45 ((DT_PROP(node_id, bias_pull_down) | DT_PROP(node_id, bias_pull_up)) \
47 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT))
83 DT_PROP(DT_PHANDLE_BY_IDX(group_id, pin_prop, idx), pin_lpsr), \
/Zephyr-latest/soc/nxp/s32/s32ze/
Dpinctrl_soc.h49 SIUL2_MSCR_OBE(DT_PROP(group, output_enable)) | \
50 SIUL2_MSCR_IBE(DT_PROP(group, input_enable)) | \
51 SIUL2_MSCR_PUE(DT_PROP(group, bias_pull_up) || \
52 DT_PROP(group, bias_pull_down)) | \
53 SIUL2_MSCR_PUS(DT_PROP(group, bias_pull_up)) | \
54 SIUL2_MSCR_SRE(DT_PROP(group, slew_rate)) | \
55 SIUL2_MSCR_ODE(DT_PROP(group, drive_open_drain) && \
56 DT_PROP(group, output_enable)) | \
57 SIUL2_MSCR_TRC(DT_PROP(group, nxp_termination_resistor)) | \
58 SIUL2_MSCR_CREF(DT_PROP(group, nxp_current_reference_control)) | \
[all …]

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