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Searched refs:DT_INST_PROP (Results 1 – 25 of 712) sorted by relevance

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/Zephyr-latest/drivers/ethernet/
Deth_xlnx_gem_priv.h422 .pll_clock_frequency = DT_INST_PROP(port, clock_frequency),\
425 (DT_INST_PROP(port, mdc_divider)),\
427 (DT_INST_PROP(port, link_speed)),\
428 .init_phy = DT_INST_PROP(port, init_mdio_phy),\
429 .phy_mdio_addr_fix = DT_INST_PROP(port, mdio_phy_address),\
430 .phy_advertise_lower = DT_INST_PROP(port, advertise_lower_link_speeds),\
431 .phy_poll_interval = DT_INST_PROP(port, phy_poll_interval),\
432 .defer_rxp_to_queue = !DT_INST_PROP(port, handle_rx_in_isr),\
433 .defer_txd_to_queue = DT_INST_PROP(port, handle_tx_in_workq),\
435 (DT_INST_PROP(port, amba_ahb_dbus_width)),\
[all …]
/Zephyr-latest/drivers/fpga/
Dfpga_ice40_common.h31 BUILD_ASSERT(DT_INST_PROP(inst, spi_max_frequency) >= FPGA_ICE40_SPI_HZ_MIN); \
32 BUILD_ASSERT(DT_INST_PROP(inst, spi_max_frequency) <= FPGA_ICE40_SPI_HZ_MAX); \
33 BUILD_ASSERT(DT_INST_PROP(inst, config_delay_us) >= FPGA_ICE40_CONFIG_DELAY_US_MIN); \
34 BUILD_ASSERT(DT_INST_PROP(inst, config_delay_us) <= UINT16_MAX); \
35 BUILD_ASSERT(DT_INST_PROP(inst, creset_delay_us) >= FPGA_ICE40_CRESET_DELAY_US_MIN); \
36 BUILD_ASSERT(DT_INST_PROP(inst, creset_delay_us) <= UINT16_MAX); \
37 BUILD_ASSERT(DT_INST_PROP(inst, leading_clocks) >= FPGA_ICE40_LEADING_CLOCKS_MIN); \
38 BUILD_ASSERT(DT_INST_PROP(inst, leading_clocks) <= UINT8_MAX); \
39 BUILD_ASSERT(DT_INST_PROP(inst, trailing_clocks) >= FPGA_ICE40_TRAILING_CLOCKS_MIN); \
40 BUILD_ASSERT(DT_INST_PROP(inst, trailing_clocks) <= UINT8_MAX); \
[all …]
/Zephyr-latest/drivers/display/
Ddisplay_gc9x01x.h90 .pwrctrl1 = DT_INST_PROP(inst, pwrctrl1), \
91 .pwrctrl2 = DT_INST_PROP(inst, pwrctrl2), \
92 .pwrctrl3 = DT_INST_PROP(inst, pwrctrl3), \
93 .pwrctrl4 = DT_INST_PROP(inst, pwrctrl4), \
94 .gamma1 = DT_INST_PROP(inst, gamma1), \
95 .gamma2 = DT_INST_PROP(inst, gamma2), \
96 .gamma3 = DT_INST_PROP(inst, gamma3), \
97 .gamma4 = DT_INST_PROP(inst, gamma4), \
98 .framerate = DT_INST_PROP(inst, framerate), \
Ddisplay_led_strip_matrix.c246 (DT_INST_PROP(inst, width) / DT_INST_PROP(inst, horizontal_modules) * \
247 (DT_INST_PROP(inst, height) / DT_INST_PROP(inst, vertical_modules))) == \
258 .width = DT_INST_PROP(inst, width), \
259 .height = DT_INST_PROP(inst, height), \
261 DT_INST_PROP(inst, width) / DT_INST_PROP(inst, horizontal_modules), \
263 DT_INST_PROP(inst, height) / DT_INST_PROP(inst, vertical_modules), \
264 .circulative = DT_INST_PROP(inst, circulative), \
265 .start_from_right = DT_INST_PROP(inst, start_from_right), \
266 .modules_circulative = DT_INST_PROP(inst, modules_circulative), \
267 .modules_start_from_right = DT_INST_PROP(inst, modules_start_from_right), \
[all …]
Ddisplay_renesas_ra.h12 #define INPUT_FORMAT_PIXEL DT_INST_PROP(0, input_pixel_format)
13 #define OUTPUT_FORMAT_PIXEL DT_INST_PROP(0, output_pixel_format)
27 #define DISPLAY_HSIZE DT_INST_PROP(0, width)
28 #define DISPLAY_VSIZE DT_INST_PROP(0, height)
Ddisplay_st7796s.c385 .width = DT_INST_PROP(n, width), \
386 .height = DT_INST_PROP(n, height), \
387 .inverted = DT_INST_PROP(n, color_invert), \
389 .frmctl1 = DT_INST_PROP(n, frmctl1), \
390 .frmctl2 = DT_INST_PROP(n, frmctl2), \
391 .frmctl3 = DT_INST_PROP(n, frmctl3), \
392 .bpc = DT_INST_PROP(n, bpc), \
393 .dfc = DT_INST_PROP(n, dfc), \
394 .pwr1 = DT_INST_PROP(n, pwr1), \
395 .pwr2 = DT_INST_PROP(n, pwr2), \
[all …]
Ddisplay_st7789v.c381 .vcom = DT_INST_PROP(inst, vcom), \
382 .gctrl = DT_INST_PROP(inst, gctrl), \
387 .mdac = DT_INST_PROP(inst, mdac), \
388 .gamma = DT_INST_PROP(inst, gamma), \
389 .colmod = DT_INST_PROP(inst, colmod), \
390 .lcm = DT_INST_PROP(inst, lcm), \
391 .inversion_on = !DT_INST_PROP(inst, inversion_off), \
392 .porch_param = DT_INST_PROP(inst, porch_param), \
393 .cmd2en_param = DT_INST_PROP(inst, cmd2en_param), \
394 .pwctrl1_param = DT_INST_PROP(inst, pwctrl1_param), \
[all …]
Ddisplay_st7735r.c501 .width = DT_INST_PROP(inst, width), \
502 .height = DT_INST_PROP(inst, height), \
503 .madctl = DT_INST_PROP(inst, madctl), \
504 .colmod = DT_INST_PROP(inst, colmod), \
505 .caset = DT_INST_PROP(inst, caset), \
506 .raset = DT_INST_PROP(inst, raset), \
507 .vmctr1 = DT_INST_PROP(inst, vmctr1), \
508 .invctr = DT_INST_PROP(inst, invctr), \
509 .pwctr1 = DT_INST_PROP(inst, pwctr1), \
510 .pwctr2 = DT_INST_PROP(inst, pwctr2), \
[all …]
Ddisplay_ist3931.c270 .vc = DT_INST_PROP(inst, voltage_converter), \
271 .vf = DT_INST_PROP(inst, voltage_follower), \
272 .bias = DT_INST_PROP(inst, lcd_bias), \
273 .ct = DT_INST_PROP(inst, lcd_ct), \
274 .duty = DT_INST_PROP(inst, duty_ratio), \
275 .fr = DT_INST_PROP(inst, frame_control), \
276 .shl = DT_INST_PROP(inst, reverse_com_output), \
277 .adc = DT_INST_PROP(inst, reverse_seg_driver), \
278 .eon = DT_INST_PROP(inst, e_force_on), \
279 .rev = DT_INST_PROP(inst, reverse_ram_lcd), \
[all …]
/Zephyr-latest/drivers/memc/
Dmemc_nxp_s32_qspi.c83 .dataAlign = COND_CODE_1(DT_INST_PROP(n, hold_time_2x), \
91 .wordAddresable = DT_INST_PROP(n, word_addressable), \
96 (.byteSwap = DT_INST_PROP(n, byte_swapping),))
99 COND_CODE_1(DT_INST_PROP(n, sample_delay_half_cycle), \
104 COND_CODE_1(DT_INST_PROP(n, sample_phase_inverted), \
110 .masters = DT_INST_PROP(n, ahb_buffers_masters), \
111 .sizes = DT_INST_PROP(n, ahb_buffers_sizes), \
112 .allMasters = (bool)DT_INST_PROP(n, ahb_buffers_all_masters), \
120 .freqEnable = DT_INST_PROP(n, side##_dll_freq_enable), \
121 .coarseDelay = DT_INST_PROP(n, side##_dll_coarse_delay), \
[all …]
Dmemc_smartbond_nor_psram.c76 DT_INST_PROP(0, is_ram)); in memc_automode_configure()
91 #if DT_INST_PROP(0, extra_byte_enable) in memc_automode_configure()
96 DT_INST_PROP(0, read_cmd)); in memc_automode_configure()
97 #if DT_INST_PROP(0, extra_byte_enable) in memc_automode_configure()
99 DT_INST_PROP(0, extra_byte)); in memc_automode_configure()
110 DT_INST_PROP(0, extra_byte_enable)); in memc_automode_configure()
121 DT_INST_PROP(0, write_cmd)); in memc_automode_configure()
134 device_density = DT_INST_PROP(0, dev_density); in memc_jedec_read_and_verify_id()
135 ret |= !(memory_id.id == DT_INST_PROP(0, dev_id)); in memc_jedec_read_and_verify_id()
136 ret |= !(memory_id.type == DT_INST_PROP(0, dev_type)); in memc_jedec_read_and_verify_id()
[all …]
Dmemc_mcux_flexspi_w956a8mbya.c145 .flexspiRootClk = DT_INST_PROP(n, spi_max_frequency), \
147 .flashSize = DT_INST_PROP(n, size) / 8 / KB(1), \
150 DT_INST_PROP(n, cs_interval_unit)), \
151 .CSInterval = DT_INST_PROP(n, cs_interval), \
152 .CSHoldTime = DT_INST_PROP(n, cs_hold_time), \
153 .CSSetupTime = DT_INST_PROP(n, cs_setup_time), \
154 .dataValidTime = DT_INST_PROP(n, data_valid_time), \
155 .columnspace = DT_INST_PROP(n, column_space), \
156 .enableWordAddress = DT_INST_PROP(n, word_addressable), \
163 DT_INST_PROP(n, ahb_write_wait_unit)), \
[all …]
Dmemc_mcux_flexspi_s27ks0641.c155 .flashSize = DT_INST_PROP(n, size) / 8 / KB(1), \
158 DT_INST_PROP(n, cs_interval_unit)), \
159 .CSInterval = DT_INST_PROP(n, cs_interval), \
160 .CSHoldTime = DT_INST_PROP(n, cs_hold_time), \
161 .CSSetupTime = DT_INST_PROP(n, cs_setup_time), \
162 .dataValidTime = DT_INST_PROP(n, data_valid_time), \
163 .columnspace = DT_INST_PROP(n, column_space), \
164 .enableWordAddress = DT_INST_PROP(n, word_addressable), \
171 DT_INST_PROP(n, ahb_write_wait_unit)), \
173 DT_INST_PROP(n, ahb_write_wait_interval), \
Dmemc_mcux_flexspi_aps6404l.c222 .flexspiRootClk = DT_INST_PROP(n, spi_max_frequency), \
224 .flashSize = DT_INST_PROP(n, size) / 8 / KB(1), \
228 DT_INST_PROP(n, cs_interval_unit)), \
229 .CSInterval = DT_INST_PROP(n, cs_interval), \
230 .CSHoldTime = DT_INST_PROP(n, cs_hold_time), \
231 .CSSetupTime = DT_INST_PROP(n, cs_setup_time), \
232 .dataValidTime = DT_INST_PROP(n, data_valid_time), \
233 .columnspace = DT_INST_PROP(n, column_space), \
234 .enableWordAddress = DT_INST_PROP(n, word_addressable), \
241 DT_INST_PROP(n, ahb_write_wait_unit)), \
[all …]
Dmemc_mcux_flexspi_is66wvq8m4.c201 .flexspiRootClk = DT_INST_PROP(n, spi_max_frequency), \
203 .flashSize = DT_INST_PROP(n, size) / 8 / KB(1), \
207 DT_INST_PROP(n, cs_interval_unit)), \
208 .CSInterval = DT_INST_PROP(n, cs_interval), \
209 .CSHoldTime = DT_INST_PROP(n, cs_hold_time), \
210 .CSSetupTime = DT_INST_PROP(n, cs_setup_time), \
211 .dataValidTime = DT_INST_PROP(n, data_valid_time), \
212 .columnspace = DT_INST_PROP(n, column_space), \
213 .enableWordAddress = DT_INST_PROP(n, word_addressable), \
220 DT_INST_PROP(n, ahb_write_wait_unit)), \
[all …]
Dmemc_mcux_flexspi_aps6408l.c279 .flexspiRootClk = DT_INST_PROP(n, spi_max_frequency), \
281 .flashSize = DT_INST_PROP(n, size) / 8 / KB(1), \
284 DT_INST_PROP(n, cs_interval_unit)), \
285 .CSInterval = DT_INST_PROP(n, cs_interval), \
286 .CSHoldTime = DT_INST_PROP(n, cs_hold_time), \
287 .CSSetupTime = DT_INST_PROP(n, cs_setup_time), \
288 .dataValidTime = DT_INST_PROP(n, data_valid_time), \
289 .columnspace = DT_INST_PROP(n, column_space), \
290 .enableWordAddress = DT_INST_PROP(n, word_addressable), \
297 DT_INST_PROP(n, ahb_write_wait_unit)), \
[all …]
/Zephyr-latest/drivers/misc/ft8xx/
Dft8xx.c55 .pclk = DT_INST_PROP(0, pclk),
56 .pclk_pol = DT_INST_PROP(0, pclk_pol),
57 .cspread = DT_INST_PROP(0, cspread),
58 .swizzle = DT_INST_PROP(0, swizzle),
59 .vsize = DT_INST_PROP(0, vsize),
60 .voffset = DT_INST_PROP(0, voffset),
61 .vcycle = DT_INST_PROP(0, vcycle),
62 .vsync0 = DT_INST_PROP(0, vsync0),
63 .vsync1 = DT_INST_PROP(0, vsync1),
64 .hsize = DT_INST_PROP(0, hsize),
[all …]
/Zephyr-latest/drivers/counter/
Dcounter_mcux_lptmr.c173 BUILD_ASSERT(!(DT_INST_PROP(n, timer_mode_sel) == 1 && \
174 DT_INST_PROP(n, prescale_glitch_filter) == 16), \
177 BUILD_ASSERT(DT_INST_PROP(n, resolution) <= 32 && \
178 DT_INST_PROP(n, resolution) > 0, \
184 GENMASK(DT_INST_PROP(n, resolution) - 1, 0), \
185 .freq = DT_INST_PROP(n, clock_frequency) / \
186 DT_INST_PROP(n, prescaler), \
191 .clk_source = DT_INST_PROP(n, clk_source), \
193 1 - DT_INST_PROP(n, timer_mode_sel), \
194 .mode = DT_INST_PROP(n, timer_mode_sel), \
[all …]
/Zephyr-latest/drivers/pwm/
Dpwm_b91.c124 .clock_frequency = DT_INST_PROP(n, clock_frequency), \
125 .channels = DT_INST_PROP(n, channels), \
127 ((DT_INST_PROP(n, clk32k_ch0_enable) << 0U) | \
128 (DT_INST_PROP(n, clk32k_ch1_enable) << 1U) | \
129 (DT_INST_PROP(n, clk32k_ch2_enable) << 2U) | \
130 (DT_INST_PROP(n, clk32k_ch3_enable) << 3U) | \
131 (DT_INST_PROP(n, clk32k_ch4_enable) << 4U) | \
132 (DT_INST_PROP(n, clk32k_ch5_enable) << 5U)), \
/Zephyr-latest/subsys/usb/device_next/class/
Dusbd_hid_macros.h96 (HID_MPS_LESS_65(DT_INST_PROP(n, in_report_size))), (0))
101 (USB_HS_INT_EP_INTERVAL(DT_INST_PROP(n, in_polling_period_us))), \
102 (USB_FS_INT_EP_INTERVAL(DT_INST_PROP(n, in_polling_period_us))))
107 (USB_HS_INT_EP_INTERVAL(DT_INST_PROP(n, out_polling_period_us))), \
108 (USB_FS_INT_EP_INTERVAL(DT_INST_PROP(n, out_polling_period_us))))
156 (sys_cpu_to_le16(USB_TPL_TO_MPS(DT_INST_PROP(n, out_report_size)))), \
157 (sys_cpu_to_le16(MIN(DT_INST_PROP(n, out_report_size), 64U))))
165 (sys_cpu_to_le16(USB_TPL_TO_MPS(DT_INST_PROP(n, in_report_size)))), \
166 (sys_cpu_to_le16(MIN(DT_INST_PROP(n, in_report_size), 64U))))
201 DT_INST_PROP(n, out_report_size), \
/Zephyr-latest/drivers/mfd/
Dmfd_npm6001.c82 (DT_INST_PROP(inst, nordic_buck_mode0_pull_down) * \
84 (DT_INST_PROP(inst, nordic_buck_mode1_pull_down) * \
86 (DT_INST_PROP(inst, nordic_buck_mode2_pull_down) * \
88 .pad_val = ((DT_INST_PROP(inst, nordic_ready_high_drive) * \
90 (DT_INST_PROP(inst, nordic_nint_high_drive) * \
92 (DT_INST_PROP(inst, nordic_sda_high_drive) * \
/Zephyr-latest/drivers/input/
Dinput_xpt2046.c242 .min_x = DT_INST_PROP(index, min_x), \
243 .min_y = DT_INST_PROP(index, min_y), \
244 .max_x = DT_INST_PROP(index, max_x), \
245 .max_y = DT_INST_PROP(index, max_y), \
246 .threshold = DT_INST_PROP(index, z_threshold), \
247 .screen_size_x = DT_INST_PROP(index, touchscreen_size_x), \
248 .screen_size_y = DT_INST_PROP(index, touchscreen_size_y), \
249 .reads = DT_INST_PROP(index, reads), \
255 BUILD_ASSERT(DT_INST_PROP(index, min_x) < DT_INST_PROP(index, max_x), \
257 BUILD_ASSERT(DT_INST_PROP(index, min_y) < DT_INST_PROP(index, max_y), \
[all …]
/Zephyr-latest/drivers/disk/
Dramdisk.c131 (DT_INST_PROP(n, sector_size) * DT_INST_PROP(n, sector_count))
139 .sector_size = DT_INST_PROP(n, sector_size), \
140 .sector_count = DT_INST_PROP(n, sector_count), \
146 static uint8_t disk_buf_##n[DT_INST_PROP(n, sector_size) * \
147 DT_INST_PROP(n, sector_count)]; \
150 .sector_size = DT_INST_PROP(n, sector_size), \
151 .sector_count = DT_INST_PROP(n, sector_count), \
164 .name = DT_INST_PROP(n, disk_name), \
/Zephyr-latest/drivers/mm/
Dmm_drv_intel_adsp.h39 #define TLB_PADDR_SIZE DT_INST_PROP(0, paddr_size)
40 #define TLB_EXEC_BIT BIT(DT_INST_PROP(0, exec_bit_idx))
41 #define TLB_WRITE_BIT BIT(DT_INST_PROP(0, write_bit_idx))
/Zephyr-latest/drivers/clock_control/
Dclock_control_nrf_auxpll.c134 .outdrive = DT_INST_PROP(n, nordic_out_drive), \
135 .current_tune = DT_INST_PROP(n, nordic_current_tune), \
136 .sdm_off = DT_INST_PROP(n, nordic_sdm_disable), \
137 .dither_off = DT_INST_PROP(n, nordic_dither_disable), \
140 .frequency = DT_INST_PROP(n, nordic_frequency), \
141 .out_div = DT_INST_PROP(n, nordic_out_div), \

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