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Searched refs:DFSS_SPI0_BASE (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/boards/snps/emsdp/
Dplatform.c10 #define DFSS_SPI0_BASE 0x80010000 macro
17 sys_out32(1, DFSS_SPI0_BASE + REG_CLK_ENA_OFFSET); in emsdp_dfss_clock_init()