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Searched refs:CLKCTRL (Results 1 – 15 of 15) sorted by relevance

/Zephyr-latest/drivers/dac/
Ddac_sam0.c81 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in dac_sam0_init()
/Zephyr-latest/drivers/clock_control/
Dclock_control_agilex5_ll.h30 #define CLKCTRL(x) (CLKCTRL_BASE_ADDR + CLKCTRL_##_reg) macro
Dclock_control_nrf2_fll16m.c74 NRF_LRCCONF010->CLKCTRL[0].SRC = mode; in activate_fll16m_mode()
/Zephyr-latest/drivers/timer/
Dsam0_rtc_timer.c259 GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(RTC_GCLK_ID) | GCLK_CLKCTRL_CLKEN in sys_clock_driver_init()
/Zephyr-latest/drivers/watchdog/
Dwdt_sam0.c267 GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_WDT in wdt_sam0_init()
/Zephyr-latest/soc/atmel/sam0/common/
Dsoc_samd2x.c176 GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(0) in dfll48m_init()
/Zephyr-latest/drivers/pwm/
Dpwm_sam0_tcc.c115 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in pwm_sam0_init()
Dpwm_sam0_tc.c146 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in pwm_sam0_init()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_sam0_eic.c351 GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN_GCLK0 | in sam0_eic_init()
/Zephyr-latest/drivers/counter/
Dcounter_sam0_tc32.c348 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in counter_sam0_tc32_initialize()
/Zephyr-latest/drivers/adc/
Dadc_sam0.c459 GCLK->CLKCTRL.reg = cfg->gclk | GCLK_CLKCTRL_CLKEN; in adc_sam0_init()
/Zephyr-latest/drivers/usb/device/
Dusb_dc_sam0.c239 GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_USB | GCLK_CLKCTRL_GEN_GCLK0 | in usb_dc_attach()
/Zephyr-latest/drivers/i2c/
Di2c_sam0.c722 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in i2c_sam0_initialize()
/Zephyr-latest/drivers/spi/
Dspi_sam0.c657 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in spi_sam0_init()
/Zephyr-latest/drivers/serial/
Duart_sam0.c522 GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | in uart_sam0_init()