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Searched refs:rw (Results 1 – 25 of 25) sorted by relevance

/Zephyr-Core-3.7.0/samples/modules/canopennode/objdict/
Dobjdict.eds189 AccessType=rw
270 AccessType=rw
279 AccessType=rw
288 AccessType=rw
339 AccessType=rw
363 AccessType=rw
390 AccessType=rw
414 AccessType=rw
423 AccessType=rw
432 AccessType=rw
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/Zephyr-Core-3.7.0/arch/arm/core/cortex_m/cmse/
Darm_core_cmse.c21 static int arm_cmse_addr_read_write_ok(uint32_t addr, int force_npriv, int rw) in arm_cmse_addr_read_write_ok() argument
30 return rw ? addr_info.flags.readwrite_ok : addr_info.flags.read_ok; in arm_cmse_addr_read_write_ok()
44 int force_npriv, int rw) in arm_cmse_addr_range_read_write_ok() argument
51 if (rw) { in arm_cmse_addr_range_read_write_ok()
116 int force_npriv, int rw) in arm_cmse_addr_nonsecure_read_write_ok() argument
125 return rw ? addr_info.flags.nonsecure_readwrite_ok : in arm_cmse_addr_nonsecure_read_write_ok()
140 int force_npriv, int rw) in arm_cmse_addr_range_nonsecure_read_write_ok() argument
147 if (rw) { in arm_cmse_addr_range_nonsecure_read_write_ok()
/Zephyr-Core-3.7.0/drivers/mdio/
Dmdio_gpio.c76 static int mdio_gpio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw, in mdio_gpio_transfer() argument
91 mdio_gpio_write(dev_cfg, rw ? 0x1 : 0x2, 2); in mdio_gpio_transfer()
97 if (rw) { /* Write data */ in mdio_gpio_transfer()
/Zephyr-Core-3.7.0/lib/posix/options/
Dmmap.c24 bool rw = (prot & PROT_WRITE) != 0; in p2z() local
34 return (rw * K_MEM_PERM_RW) | (ex * K_MEM_PERM_EXEC) | (fixed * K_MEM_DIRECT_MAP); in p2z()
Dshm.c302 bool rw = (oflag & O_RDWR) != 0; in shm_open() local
314 if (!(rd ^ rw)) { in shm_open()
/Zephyr-Core-3.7.0/soc/neorv32/
Dlinker.ld11 IO (rw) : ORIGIN = 0xFFFFFE00, LENGTH = 512
/Zephyr-Core-3.7.0/drivers/smbus/
Dintel_pch_smbus.c366 uint8_t rw, uint8_t command, uint8_t count, in pch_smbus_block_start() argument
372 LOG_DBG("addr %x rw %d command %x", periph_addr, rw, command); in pch_smbus_block_start()
376 reg |= rw & SMBUS_MSG_RW_MASK; in pch_smbus_block_start()
394 if (rw == SMBUS_MSG_WRITE) { in pch_smbus_block_start()
420 enum smbus_direction rw, uint8_t command, in pch_smbus_start() argument
426 LOG_DBG("addr 0x%02x rw %d command %x", periph_addr, rw, command); in pch_smbus_start()
430 reg |= rw & SMBUS_MSG_RW_MASK; in pch_smbus_start()
439 if (rw == SMBUS_MSG_WRITE && protocol != SMBUS_CMD_BYTE) { in pch_smbus_start()
468 enum smbus_direction rw) in pch_smbus_quick() argument
473 LOG_DBG("dev %p addr 0x%02x direction %x", dev, periph_addr, rw); in pch_smbus_quick()
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Dsmbus_handlers.c31 enum smbus_direction rw) in z_vrfy_smbus_quick() argument
35 return z_impl_smbus_quick(dev, addr, rw); in z_vrfy_smbus_quick()
Dsmbus_stm32.c138 enum smbus_direction rw) in smbus_stm32_quick() argument
142 switch (rw) { in smbus_stm32_quick()
148 LOG_ERR("%s: invalid smbus direction %i", dev->name, rw); in smbus_stm32_quick()
/Zephyr-Core-3.7.0/soc/renesas/smartbond/da1469x/
Dintvect_reserved.ld9 /* Access to addresses in range 0x0-0x1ff is remapped to sram to allow rw
/Zephyr-Core-3.7.0/boards/nxp/frdm_rw612/
Dfrdm_rw612-pinctrl.dtsi7 #include <nxp/rw/RW612-pinctrl.h>
/Zephyr-Core-3.7.0/include/zephyr/arch/x86/ia32/
Dsegmentation.h156 uint8_t rw:1; member
273 .rw = (readable_p), \
285 .rw = (writable_p), \
/Zephyr-Core-3.7.0/drivers/ethernet/
Dphy_gecko.c55 uint8_t rw, uint16_t data) in mdio_bus_send() argument
62 | ((rw ? 0x02 : 0x01) << _ETH_PHYMNGMNT_OPERATION_SHIFT) in mdio_bus_send()
/Zephyr-Core-3.7.0/soc/gaisler/gr716a/
Dlinker.ld26 RAM (rw) : ORIGIN = 0x30000000, LENGTH = 64K
/Zephyr-Core-3.7.0/boards/nxp/rd_rw612_bga/
Drd_rw612_bga-pinctrl.dtsi7 #include <nxp/rw/RW612-pinctrl.h>
/Zephyr-Core-3.7.0/drivers/i2c/
Di2c_smartbond.c284 const bool rw = ((data->msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ); in i2c_smartbond_tx() local
295 (rw ? I2C_I2C_DATA_CMD_REG_I2C_CMD_Msk in i2c_smartbond_tx()
459 const bool rw = ((data->msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ); in isr_tx() local
464 (rw ? I2C_I2C_DATA_CMD_REG_I2C_CMD_Msk in isr_tx()
/Zephyr-Core-3.7.0/include/zephyr/arch/arc/v2/
Dlinker.ld68 DCCM (rw) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE
71 XCCM (rw) : ORIGIN = XCCM_START, LENGTH = XCCM_SIZE
74 YCCM (rw) : ORIGIN = YCCM_START, LENGTH = YCCM_SIZE
/Zephyr-Core-3.7.0/boards/intel/ish/doc/
Dindex.rst61 $ mount -o remount,rw /
/Zephyr-Core-3.7.0/dts/arm/nxp/
Dnxp_rw6xx_common.dtsi153 compatible = "nxp,rw-pmu";
259 compatible = "nxp,rw-soc-ctrl";
265 compatible = "nxp,rw-soc-ctrl";
/Zephyr-Core-3.7.0/cmake/linker_script/arm/
Dlinker.cmake44 # Only use 'rw' as FLAGS. It's not used anyway.
47 zephyr_linker_dts_memory(PATH ${path} FLAGS rw)
/Zephyr-Core-3.7.0/boards/nordic/nrf54h20dk/
Dnrf54h20dk_nrf54h20-memory_map.dtsi205 cpuapp_rw_partitions: cpuapp-rw-partitions {
/Zephyr-Core-3.7.0/samples/subsys/fs/littlefs/
DREADME.rst56 sudo chmod a+rw /dev/sda
/Zephyr-Core-3.7.0/samples/subsys/usb/mass/
DREADME.rst219 brw-rw---- 1 root disk 8, 48 Apr 25 08:10 /dev/sdd
225 sudo chmod a+rw /dev/sdd # required to allow user access
/Zephyr-Core-3.7.0/drivers/sdhc/
Dsdhc_esp32.c287 if (cmd.data_expected && cmd.rw && sdmmc_ll_is_card_write_protected(sdio_hw, slot)) { in sdmmc_host_start_command()
601 res.rw = 1; in make_hw_cmd()
/Zephyr-Core-3.7.0/boards/qemu/x86/
Dqemu_x86_tiny.ld64 FLASH (rw) : ORIGIN = FLASH_ROM_ADDR, LENGTH = FLASH_ROM_SIZE