Searched refs:pol (Results 1 – 10 of 10) sorted by relevance
50 uint32_t pol; member214 config->wkup_regs->pol |= pin_mask; in gpio_smartbond_arm_next_edge_interrupt()216 config->wkup_regs->pol &= ~pin_mask; in gpio_smartbond_arm_next_edge_interrupt()255 config->wkup_regs->pol &= ~pin_mask; in gpio_smartbond_pin_interrupt_configure()257 config->wkup_regs->pol |= pin_mask; in gpio_smartbond_pin_interrupt_configure()
111 int port0_policy_cb_vconn_en(const struct device *dev, enum tc_cc_polarity pol, bool en) in port0_policy_cb_vconn_en() argument115 dpm_data->vconn_pol = pol; in port0_policy_cb_vconn_en()120 } else if (pol == TC_POLARITY_CC1) { in port0_policy_cb_vconn_en()
120 uint8_t pol, uint32_t srcClock_Hz) in spi_flexio_master_init() argument191 timerConfig.pinPolarity = pol ? kFLEXIO_PinActiveLow : kFLEXIO_PinActiveHigh; in spi_flexio_master_init()
122 enum tc_cc_polarity pol, bool enable);124 enum tc_cc_polarity pol, bool enable);
626 int pol; in pthread_create() local629 zephyr_to_posix_priority(k_thread_priority_get(k_current_get()), &pol); in pthread_create()630 t->attr.schedpolicy = pol; in pthread_create()
165 int pol = (cr & UCPD_CR_PHYCCSEL); in ucpd_get_cc_enable_mask() local168 mask &= ~BIT(UCPD_CR_CCENABLE_Pos + !pol); in ucpd_get_cc_enable_mask()
480 wkup-pins-pol;
526 wkup-pins-pol;
510 wkup-pins-pol;
860 wkup-pins-pol;
