Searched refs:UART2 (Results 1 – 25 of 55) sorted by relevance
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/Zephyr-Core-3.7.0/tests/boards/mec15xxevb_assy6853/i2c_api/ |
D | README.txt | 12 to I2C00 port, however, I2C00 port is shared with UART2 RS232 to TTL 13 converter used to catch serial log, so it's not possible to use UART2
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/Zephyr-Core-3.7.0/tests/boards/mec172xevb_assy6906/i2c_api/ |
D | README.txt | 12 to I2C00 port, however, I2C00 port is shared with UART2 RS232 to TTL 13 converter used to catch serial log, so it's not possible to use UART2
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/Zephyr-Core-3.7.0/soc/microchip/mec/mec15xx/ |
D | Kconfig | 61 JTAG port in SWD mode. UART2 and ADC00-03 can be used. 82 UART2 can be used, but ADC00-03 cannot. 88 UART2 cannot be used. ADC00-03 can be used.
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/Zephyr-Core-3.7.0/boards/particle/xenon/dts/ |
D | mesh_xenon_uart2.dtsi | 7 /* Add UART2 support on particle_xenon via nRF52840 UARTE1 */
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/Zephyr-Core-3.7.0/drivers/serial/ |
D | uart_ite_it8xxx2.c | 43 UART2, enumerator 169 } else if (config->port == UART2) { in uart_it8xxx2_init()
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/Zephyr-Core-3.7.0/boards/particle/xenon/ |
D | particle_xenon.dts | 39 &uart1 { /* feather UART2 */
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/Zephyr-Core-3.7.0/boards/microchip/mec15xxevb_assy6853/doc/ |
D | index.rst | 29 - UART0, UART1, and UART2 105 UART2 is configured for serial logs. 173 Each column of the following table illustrates how to enable UART2, SWD, 178 | (UART2) | (UART2) | (SWD) | (PVT SPI) | (SHD SPI)| (LED0-2)| 193 .. note:: For UART2 make sure JP39 have jumpers connected 1-2, 3-4. 195 To receive UART2 serial output, please refer to the picture below 196 to make sure that JP9 configured for UART2 output. 337 #. Connect UART2 port of the MEC15xxEVB_ASSY_6853 board 425 however, I2C00 port is shared with UART2 RS232 to TTL converter used to catch serial log, 426 so it's not possible to use UART2 and I2C00 port simultaneously. We need to change to use
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/Zephyr-Core-3.7.0/boards/arm/fvp_baser_aemv8r/ |
D | board.cmake | 29 # UART2 config 63 # UART2 config
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/Zephyr-Core-3.7.0/boards/arm/fvp_base_revc_2xaemv8a/ |
D | board.cmake | 19 # UART2 config
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/Zephyr-Core-3.7.0/boards/particle/xenon/doc/ |
D | index.rst | 92 UART2 pins 126 * UARTE1 selectable with overlay (UART2)
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/Zephyr-Core-3.7.0/boards/nxp/rddrone_fmuk66/ |
D | rddrone_fmuk66-pinctrl.dtsi | 71 /* conflicts with UART2 */
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/Zephyr-Core-3.7.0/boards/qemu/malta/doc/ |
D | index.rst | 55 with the FPGA UART2.
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/Zephyr-Core-3.7.0/boards/nxp/imx8mq_evk/doc/ |
D | index.rst | 82 | UART2 RXD | UART2_TXD | UART Console | 84 | UART2 TXD | UART2_RXD | UART Console |
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/Zephyr-Core-3.7.0/boards/others/black_f407zg_pro/doc/ |
D | index.rst | 163 BLACK_F407ZG_PRO has up to 6 UARTs. The Zephyr console output is assigned to UART2. 167 it to UART2 pins (PA2/PA3).
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/Zephyr-Core-3.7.0/boards/st/stm32f4_disco/doc/ |
D | index.rst | 149 STM32F4DISCOVERY Discovery kit has up to 6 UARTs. The Zephyr console output is assigned to UART2. 152 enable console output you should use a serial cable and connect it to UART2 pins (PA2/PA3).
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/Zephyr-Core-3.7.0/dts/arm/nuvoton/npcx/ |
D | npcx9.dtsi | 95 /* Index 0: UART2 register, Index 1: MDMA2 register */ 98 /* Index 0: UART2 clock, Index 1: MDMA2 clock */
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/Zephyr-Core-3.7.0/boards/arduino/portenta_h7/ |
D | arduino_portenta_h7-common.dtsi | 64 /* UART2 in datasheet */
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/Zephyr-Core-3.7.0/boards/firefly/roc_rk3568_pc/doc/ |
D | index.rst | 73 CPU's UART2.
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/Zephyr-Core-3.7.0/boards/st/nucleo_f303re/doc/ |
D | index.rst | 140 to UART2. Default settings are 115200 8N1.
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/Zephyr-Core-3.7.0/boards/madmachine/mm_feather/doc/ |
D | index.rst | 129 +-----------+---------------+----------+---------------+ UART2 | UART_4 |
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/Zephyr-Core-3.7.0/boards/st/nucleo_f303k8/doc/ |
D | index.rst | 136 to UART2. Default settings are 115200 8N1.
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/Zephyr-Core-3.7.0/boards/st/stm32l4r9i_disco/doc/ |
D | index.rst | 87 The Zephyr console output is assigned to UART2, which is connected to the onboard
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/Zephyr-Core-3.7.0/boards/madmachine/mm_swiftio/doc/ |
D | index.rst | 101 +-----------+---------------+----------+---------------+ UART2 | UART_4 |
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/Zephyr-Core-3.7.0/boards/st/nucleo_f302r8/doc/ |
D | index.rst | 145 to UART2. Default settings are 115200 8N1.
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/Zephyr-Core-3.7.0/boards/phytec/mimx8mm_phyboard_polis/doc/ |
D | index.rst | 118 | To WiFi Module| UART2 | UART to WiFi/BLE Module | 126 Please note, that the to UART2 connected Wifi/BLE Module isn't working with
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