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Searched refs:REG_IER (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/arch/x86/core/
Dearly_serial.c47 #define REG_IER 0x01 /* Interrupt enable reg. */ macro
105 OUT(REG_IER, IER_DISABLE); /* Disable interrupts */ in z_x86_early_serial_init()
/Zephyr-latest/drivers/i2c/
Di2c_xilinx_axi.c62 sys_write32(ISR_ADDR_TARGET, config->base + REG_IER); in i2c_xilinx_axi_target_setup()
123 int_enable = sys_read32(config->base + REG_IER); in i2c_xilinx_axi_target_unregister()
125 sys_write32(int_enable, config->base + REG_IER); in i2c_xilinx_axi_target_unregister()
223 uint32_t int_enable = sys_read32(config->base + REG_IER); in i2c_xilinx_axi_isr()
245 sys_write32(int_enable & ~int_status, config->base + REG_IER); in i2c_xilinx_axi_isr()
268 const uint32_t int_enable = sys_read32(config->base + REG_IER) | int_mask; in i2c_xilinx_axi_wait_interrupt()
272 sys_write32(int_enable, config->base + REG_IER); in i2c_xilinx_axi_wait_interrupt()
Di2c_xilinx_axi.h18 REG_IER = 0x028, /* Interrupt Enable */ enumerator
/Zephyr-latest/drivers/serial/
Duart_mchp_xec.c56 #define REG_IER 0x01 /* Interrupt enable reg. */ macro
Duart_ns16550.c93 #define REG_IER 0x01 /* Interrupt enable reg. */ macro
251 #define IER(dev) (get_port(dev) + (REG_IER * reg_interval(dev)))