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Searched refs:syscon (Results 1 – 25 of 66) sorted by relevance

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/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_control_lpc11u6x.c17 static void syscon_power_up(struct lpc11u6x_syscon_regs *syscon, in syscon_power_up() argument
21 syscon->pd_run_cfg = (syscon->pd_run_cfg & ~bit) in syscon_power_up()
24 syscon->pd_run_cfg = syscon->pd_run_cfg | bit in syscon_power_up()
29 static void syscon_set_pll_src(struct lpc11u6x_syscon_regs *syscon, in syscon_set_pll_src() argument
32 syscon->sys_pll_clk_sel = src; in syscon_set_pll_src()
33 syscon->sys_pll_clk_uen = 0; in syscon_set_pll_src()
34 syscon->sys_pll_clk_uen = 1; in syscon_set_pll_src()
44 static void syscon_setup_pll(struct lpc11u6x_syscon_regs *syscon, in syscon_setup_pll() argument
51 syscon->sys_pll_ctrl = val; in syscon_setup_pll()
54 static bool syscon_pll_locked(struct lpc11u6x_syscon_regs *syscon) in syscon_pll_locked() argument
[all …]
Dclock_control_ast10x0.c47 const struct device *syscon; member
54 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_on() local
68 syscon_write_reg(syscon, addr, BIT(clk_gate)); in aspeed_clock_control_on()
75 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_off() local
89 syscon_write_reg(syscon, addr, BIT(clk_gate)); in aspeed_clock_control_off()
97 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_get_rate() local
106 syscon_read_reg(syscon, CLK_SELECTION_REG4, &reg); in aspeed_clock_control_get_rate()
117 syscon_read_reg(syscon, CLK_SELECTION_REG5, &reg); in aspeed_clock_control_get_rate()
123 syscon_read_reg(syscon, CLK_SELECTION_REG4, &reg); in aspeed_clock_control_get_rate()
157 .syscon = DEVICE_DT_GET(DT_NODELABEL(syscon)), \
/Zephyr-Core-3.6.0/tests/drivers/syscon/src/
Dmain.c13 uint8_t var_in_res0[DT_REG_SIZE(DT_NODELABEL(syscon))] __attribute((__section__(RES_SECT)));
15 ZTEST(syscon, test_size) in ZTEST() argument
17 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
18 const size_t expected_size = DT_REG_SIZE(DT_NODELABEL(syscon)); in ZTEST()
27 ZTEST(syscon, test_out_of_bounds) in ZTEST() argument
29 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
32 zassert_equal(syscon_read_reg(dev, DT_REG_SIZE(DT_NODELABEL(syscon)), &val), -EINVAL); in ZTEST()
33 zassert_equal(syscon_write_reg(dev, DT_REG_SIZE(DT_NODELABEL(syscon)), val), -EINVAL); in ZTEST()
36 ZTEST(syscon, test_read) in ZTEST() argument
38 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
[all …]
/Zephyr-Core-3.6.0/drivers/reset/
Dreset_ast10x0.c30 const struct device *syscon; member
36 const struct device *syscon = config->syscon; in aspeed_reset_line_assert() local
44 return syscon_write_reg(syscon, addr, BIT(id)); in aspeed_reset_line_assert()
50 const struct device *syscon = config->syscon; in aspeed_reset_line_deassert() local
58 return syscon_write_reg(syscon, addr, BIT(id)); in aspeed_reset_line_deassert()
64 const struct device *syscon = config->syscon; in aspeed_reset_status() local
74 ret = syscon_read_reg(syscon, addr, &reg_value); in aspeed_reset_status()
103 .syscon = DEVICE_DT_GET(DT_NODELABEL(syscon)), \
/Zephyr-Core-3.6.0/boards/arm/v2m_beetle/
Dv2m_beetle.dts54 clocks = <&syscon>;
61 clocks = <&syscon>;
68 clocks = <&syscon>;
75 clocks = <&sysclk &syscon>;
83 clocks = <&sysclk &syscon>;
99 clocks = <&syscon>;
108 clocks = <&syscon>;
117 clocks = <&syscon>;
126 clocks = <&syscon>;
129 syscon: syscon@4001f000 { label
[all …]
/Zephyr-Core-3.6.0/dts/arm/nxp/
Dnxp_lpc51u68.dtsi25 syscon: syscon@40000000 { label
26 compatible = "nxp,lpc-syscon";
90 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
98 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
106 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
114 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
122 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
130 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
138 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
146 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
[all …]
Dnxp_lpc11u6x.dtsi91 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
107 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
125 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
131 syscon: clock-controller@40048000 { label
132 compatible = "nxp,lpc11u6x-syscon";
139 clocks = <&syscon LPC11U6X_CLOCK_USART0>;
147 clocks = <&syscon LPC11U6X_CLOCK_USART1>;
155 clocks = <&syscon LPC11U6X_CLOCK_USART2>;
163 clocks = <&syscon LPC11U6X_CLOCK_USART3>;
171 clocks = <&syscon LPC11U6X_CLOCK_USART4>;
[all …]
Dnxp_lpc55S0x_common.dtsi67 syscon: syscon@0 { label
68 compatible = "nxp,lpc-syscon";
149 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
157 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
165 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
173 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
181 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
189 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
197 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
205 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
[all …]
Dnxp_lpc55S1x_common.dtsi72 syscon: syscon@0 { label
73 compatible = "nxp,lpc-syscon";
154 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
162 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
170 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
178 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
186 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
194 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
202 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
210 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
[all …]
Dnxp_lpc55S6x_common.dtsi101 syscon: syscon@0 { label
102 compatible = "nxp,lpc-syscon";
213 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
221 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
229 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
237 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
245 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
253 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
261 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
269 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
[all …]
Dnxp_lpc54xxx.dtsi40 syscon: syscon@40000000 { label
41 compatible = "nxp,lpc-syscon";
153 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
161 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
169 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
177 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
185 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
193 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
201 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
209 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
Dnxp_lpc55S3x_common.dtsi76 syscon: syscon@0 { label
77 compatible = "nxp,lpc-syscon";
185 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
195 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
205 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
215 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
225 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
235 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
245 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
255 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
[all …]
Dnxp_lpc55S2x_common.dtsi86 syscon: syscon@0 { label
87 compatible = "nxp,lpc-syscon";
180 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
188 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
196 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
204 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
212 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
220 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
228 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
236 clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
[all …]
/Zephyr-Core-3.6.0/tests/drivers/syscon/boards/
Dqemu_cortex_a53.overlay19 syscon: syscon@47000000 {
20 compatible = "syscon";
/Zephyr-Core-3.6.0/dts/riscv/
Dneorv32.dtsi79 syscon = <&sysinfo>;
86 syscon = <&sysinfo>;
109 syscon = <&sysinfo>;
120 syscon = <&sysinfo>;
131 syscon = <&sysinfo>;
134 sysinfo: syscon@ffffffe0 {
135 compatible = "neorv-sysinfo", "syscon";
/Zephyr-Core-3.6.0/drivers/cache/
Dcache_aspeed.c52 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in aspeed_cache_init()
115 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_disable()
127 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_disable()
134 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_invd_all()
164 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_invd_range()
196 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_invd_all()
225 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_invd_range()
311 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_line_size_get()
323 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_line_size_get()
/Zephyr-Core-3.6.0/drivers/entropy/
Dentropy_neorv32_trng.c26 const struct device *syscon; member
91 if (!device_is_ready(config->syscon)) { in neorv32_trng_init()
96 err = syscon_read_reg(config->syscon, NEORV32_SYSINFO_FEATURES, &features); in neorv32_trng_init()
137 .syscon = DEVICE_DT_GET(DT_INST_PHANDLE(n, syscon)), \
/Zephyr-Core-3.6.0/dts/arm/aspeed/
Dast10x0.dtsi28 syscon: syscon@7e6e2000 { label
29 compatible = "syscon";
/Zephyr-Core-3.6.0/drivers/gpio/
Dgpio_neorv32.c29 const struct device *syscon; member
177 if (!device_is_ready(config->syscon)) { in neorv32_gpio_init()
182 err = syscon_read_reg(config->syscon, NEORV32_SYSINFO_FEATURES, &features); in neorv32_gpio_init()
218 .syscon = DEVICE_DT_GET(DT_INST_PHANDLE(n, syscon)), \
/Zephyr-Core-3.6.0/drivers/syscon/
DKconfig16 platform-specific code, to acquire a reference to the syscon node and
22 module-str = syscon
36 This option controls the priority of the syscon device
DCMakeLists.txt4 zephyr_library_sources_ifdef(CONFIG_SYSCON_GENERIC syscon.c)
/Zephyr-Core-3.6.0/soc/riscv/andes_v5/ae350/
Dl2_cache.c86 #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(syscon), andestech_atcsmu100, okay) in andes_v5_l2c_init()
87 const struct device *const syscon_dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in andes_v5_l2c_init()
/Zephyr-Core-3.6.0/tests/drivers/syscon/
DCMakeLists.txt7 project(syscon) project
/Zephyr-Core-3.6.0/dts/arm/renesas/rz/
Drzt2m.dtsi73 compatible = "syscon";
80 compatible = "syscon";
87 compatible = "syscon";
/Zephyr-Core-3.6.0/boards/arm/lpcxpresso55s69/
Dpre_dt_board.cmake8 # - /soc/peripheral@40000000/syscon@0 & /soc/peripheral@40000000/gpio@0

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