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Searched refs:shift (Results 1 – 25 of 135) sorted by relevance

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/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-rcar-common.h25 #define IPSR(bank, shift, func) (((bank) << 10U) | ((shift) << 4U) | (func)) argument
49 #define IPnSR(bank, reg, shift, func) \ argument
50 IPSR(((reg) << 5U) | (bank), shift, func)
52 #define IP0SR0(shift, func) IPnSR(0, 0, shift, func) argument
53 #define IP1SR0(shift, func) IPnSR(1, 0, shift, func) argument
54 #define IP2SR0(shift, func) IPnSR(2, 0, shift, func) argument
55 #define IP3SR0(shift, func) IPnSR(3, 0, shift, func) argument
56 #define IP0SR1(shift, func) IPnSR(0, 1, shift, func) argument
57 #define IP1SR1(shift, func) IPnSR(1, 1, shift, func) argument
58 #define IP2SR1(shift, func) IPnSR(2, 1, shift, func) argument
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/Zephyr-Core-3.6.0/include/zephyr/dsp/
Dprint_format.h32 static inline int64_t ___PRIq_arg_shift(int64_t q, int shift) in ___PRIq_arg_shift() argument
34 if (shift < 0) { in ___PRIq_arg_shift()
35 return llabs(q) >> -shift; in ___PRIq_arg_shift()
37 return llabs(q) << shift; in ___PRIq_arg_shift()
45 #define __PRIq_arg_shift(q, shift) ___PRIq_arg_shift(q, ((shift) + (8 * (4 - (int)sizeof(q))))) argument
46 #define __PRIq_arg_get(q, shift, h, l) FIELD_GET(GENMASK64(h, l), __PRIq_arg_shift(q, shift)) argument
47 #define __PRIq_arg_get_int(q, shift) __PRIq_arg_get(q, shift, 63, 31) argument
48 #define __PRIq_arg_get_frac(q, precision, shift) \ argument
49 ((__PRIq_arg_get(q, shift, 30, 0) * __CONSTPOW(1, precision)) / INT32_MAX)
58 #define PRIq_arg(q, precision, shift) \ argument
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/Zephyr-Core-3.6.0/drivers/sensor/icm42688/
Dicm42688_emul.c128 int8_t *shift) in icm42688_emul_get_accel_settings() argument
171 if (shift) { in icm42688_emul_get_accel_settings()
172 *shift = shift_out; in icm42688_emul_get_accel_settings()
181 q31_t *epsilon, int8_t *shift) in icm42688_emul_get_accel_ranges() argument
186 icm42688_emul_get_accel_settings(target, &fs_g, &sensitivity, shift); in icm42688_emul_get_accel_ranges()
189 *epsilon = (3 * SENSOR_G * Q31_SCALE / sensitivity / 1000000LL / 2) >> *shift; in icm42688_emul_get_accel_ranges()
190 *upper = (fs_g * SENSOR_G * Q31_SCALE / 1000000LL) >> *shift; in icm42688_emul_get_accel_ranges()
199 int *sensitivity, int8_t *shift) in icm42688_emul_get_gyro_settings() argument
262 if (shift) { in icm42688_emul_get_gyro_settings()
263 *shift = shift_out; in icm42688_emul_get_gyro_settings()
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Dicm42688_decoder.c17 static int icm42688_get_shift(enum sensor_channel channel, int accel_fs, int gyro_fs, int8_t *shift) in icm42688_get_shift() argument
26 *shift = 5; in icm42688_get_shift()
29 *shift = 6; in icm42688_get_shift()
32 *shift = 7; in icm42688_get_shift()
35 *shift = 8; in icm42688_get_shift()
46 *shift = -1; in icm42688_get_shift()
49 *shift = 0; in icm42688_get_shift()
52 *shift = 1; in icm42688_get_shift()
55 *shift = 2; in icm42688_get_shift()
58 *shift = 3; in icm42688_get_shift()
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/Zephyr-Core-3.6.0/drivers/sensor/bmi160/
Demul_bmi160.c89 int shift; in reg_write() local
94 shift = BMI160_PMU_STATUS_ACC_POS; in reg_write()
97 shift = BMI160_PMU_STATUS_GYR_POS; in reg_write()
101 shift = BMI160_PMU_STATUS_MAG_POS; in reg_write()
104 data->pmu_status &= 3 << shift; in reg_write()
105 data->pmu_status |= pmu_val << shift; in reg_write()
283 const q31_t *value, int8_t shift) in bmi160_emul_backend_set_channel() argument
348 if (shift < scale_shift) { in bmi160_emul_backend_set_channel()
350 intermediate >>= scale_shift - shift; in bmi160_emul_backend_set_channel()
351 } else if (shift > 0 && shift > scale_shift) { in bmi160_emul_backend_set_channel()
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/Zephyr-Core-3.6.0/include/zephyr/drivers/
Demul_sensor.h31 int8_t shift);
34 q31_t *upper, q31_t *epsilon, int8_t *shift);
41 q31_t *increment, int8_t *shift);
72 const q31_t *value, int8_t shift) in emul_sensor_backend_set_channel() argument
81 return api->set_channel(target, ch, value, shift); in emul_sensor_backend_set_channel()
105 q31_t *upper, q31_t *epsilon, int8_t *shift) in emul_sensor_backend_get_sample_range() argument
114 return api->get_sample_range(target, ch, lower, upper, epsilon, shift); in emul_sensor_backend_get_sample_range()
167 q31_t *increment, int8_t *shift) in emul_sensor_backend_get_attribute_metadata() argument
178 return api->get_attribute_metadata(target, ch, attribute, min, max, increment, shift); in emul_sensor_backend_get_attribute_metadata()
Dsensor_data_types.h53 int8_t shift; member
72 PRIq_arg((data_).readings[(readings_offset_)].x, 6, (data_).shift), \
73 PRIq_arg((data_).readings[(readings_offset_)].y, 6, (data_).shift), \
74 PRIq_arg((data_).readings[(readings_offset_)].z, 6, (data_).shift)
93 int8_t shift; member
120 PRIq_arg((data_).readings[(readings_offset_)].value, 6, (data_).shift)
/Zephyr-Core-3.6.0/tests/drivers/build_all/sensor/src/
Dgeneric_test.c112 int8_t shift; in run_generic_test() local
115 &channel_table[ch].epsilon, &shift) == 0) { in run_generic_test()
120 channel_table[ch].epsilon, shift); in run_generic_test()
129 channel_table[ch].expected_value_shift = shift; in run_generic_test()
214 int8_t shift; in run_generic_test() local
222 shift = decoded_data.three_axis.shift; in run_generic_test()
228 shift = decoded_data.three_axis.shift; in run_generic_test()
234 shift = decoded_data.three_axis.shift; in run_generic_test()
240 shift = decoded_data.q31.shift; in run_generic_test()
248 int64_t actual_shifted = (int64_t)q << shift; in run_generic_test()
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/Zephyr-Core-3.6.0/drivers/sensor/bma4xx/
Dbma4xx_emul.c191 void bma4xx_emul_set_accel_data(const struct emul *target, q31_t value, int8_t shift, int8_t reg) in bma4xx_emul_set_accel_data() argument
206 unshifted = shift < 0 ? ((int64_t)value >> -shift) : ((int64_t)value << shift); in bma4xx_emul_set_accel_data()
220 const q31_t *value, int8_t shift) in bma4xx_emul_backend_set_channel() argument
231 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_8); in bma4xx_emul_backend_set_channel()
234 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_10); in bma4xx_emul_backend_set_channel()
237 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_12); in bma4xx_emul_backend_set_channel()
240 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_8); in bma4xx_emul_backend_set_channel()
241 bma4xx_emul_set_accel_data(target, value[1], shift, BMA4XX_REG_DATA_10); in bma4xx_emul_backend_set_channel()
242 bma4xx_emul_set_accel_data(target, value[2], shift, BMA4XX_REG_DATA_12); in bma4xx_emul_backend_set_channel()
255 int8_t *shift) in bma4xx_emul_backend_get_sample_range() argument
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/Zephyr-Core-3.6.0/subsys/bluetooth/mesh/
Drpl.c240 int shift = 0; in bt_mesh_rpl_reset() local
250 shift++; in bt_mesh_rpl_reset()
254 if (shift > 0) { in bt_mesh_rpl_reset()
255 replay_list[i - shift] = *rpl; in bt_mesh_rpl_reset()
263 (void)memset(&replay_list[last - shift + 1], 0, sizeof(struct bt_mesh_rpl) * shift); in bt_mesh_rpl_reset()
346 int shift = 0; in bt_mesh_rpl_pending_store() local
373 shift++; in bt_mesh_rpl_pending_store()
375 if (shift > 0) { in bt_mesh_rpl_pending_store()
376 replay_list[i - shift] = *rpl; in bt_mesh_rpl_pending_store()
379 store_rpl(&replay_list[i - shift]); in bt_mesh_rpl_pending_store()
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/Zephyr-Core-3.6.0/drivers/gpio/
Dgpio_bcm2711.c73 uint32_t shift; in gpio_bcm2711_pin_configure() local
83 shift = GPIO_REG_SHIFT(RPI_PIN_NUM(port, pin), FSEL_GROUPS, FSEL_BITS); in gpio_bcm2711_pin_configure()
86 regval &= ~(BIT_MASK(FSEL_BITS) << shift); in gpio_bcm2711_pin_configure()
88 regval |= (FSEL_OUTPUT << shift); in gpio_bcm2711_pin_configure()
96 shift = GPIO_REG_SHIFT(RPI_PIN_NUM(port, pin), IO_GROUPS, IO_BITS); in gpio_bcm2711_pin_configure()
100 regval |= BIT(shift); in gpio_bcm2711_pin_configure()
104 regval |= BIT(shift); in gpio_bcm2711_pin_configure()
112 shift = GPIO_REG_SHIFT(RPI_PIN_NUM(port, pin), PULL_GROUPS, PULL_BITS); in gpio_bcm2711_pin_configure()
115 regval &= ~(BIT_MASK(PULL_BITS) << shift); in gpio_bcm2711_pin_configure()
117 regval |= (PULL_UP << shift); in gpio_bcm2711_pin_configure()
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/Zephyr-Core-3.6.0/drivers/sensor/akm09918c/
Dakm09918c_emul.c137 const q31_t *value, int8_t shift) in akm09918c_emul_backend_set_channel() argument
166 (shift < 0 ? ((int64_t)*value >> -shift) : ((int64_t)*value << shift)) * 1000000 / in akm09918c_emul_backend_set_channel()
182 q31_t *upper, q31_t *epsilon, int8_t *shift) in akm09918c_emul_backend_get_sample_range() argument
186 if (!lower || !upper || !epsilon || !shift) { in akm09918c_emul_backend_get_sample_range()
195 *shift = 6; in akm09918c_emul_backend_get_sample_range()
196 *upper = (int64_t)(49.12 * ((int64_t)INT32_MAX + 1)) >> *shift; in akm09918c_emul_backend_get_sample_range()
198 *epsilon = (int64_t)(0.0015 * ((int64_t)INT32_MAX + 1)) >> *shift; in akm09918c_emul_backend_get_sample_range()
/Zephyr-Core-3.6.0/dts/arm64/ti/
Dti_am62x_a53.dtsi67 reg-shift = <2>;
78 reg-shift = <2>;
89 reg-shift = <2>;
100 reg-shift = <2>;
111 reg-shift = <2>;
122 reg-shift = <2>;
133 reg-shift = <2>;
/Zephyr-Core-3.6.0/drivers/sensor/amd_sb_tsi/
Dsb_tsi_emul.c103 const q31_t *value, int8_t shift) in sb_tsi_emul_set_channel() argument
114 scaled_value = (int64_t)*value << shift; in sb_tsi_emul_set_channel()
125 q31_t *lower, q31_t *upper, q31_t *epsilon, int8_t *shift) in sb_tsi_emul_get_sample_range() argument
131 *shift = 8; in sb_tsi_emul_get_sample_range()
133 *upper = (int64_t)(255.875 * ((int64_t)INT32_MAX + 1)) >> *shift; in sb_tsi_emul_get_sample_range()
134 *epsilon = (int64_t)(0.125 * ((int64_t)INT32_MAX + 1)) >> *shift; in sb_tsi_emul_get_sample_range()
/Zephyr-Core-3.6.0/tests/lib/cmsis_dsp/fastmath/src/
Dq15.c123 uint16_t *shift; in ZTEST() local
129 shift = malloc(length * sizeof(uint16_t)); in ZTEST()
130 zassert_not_null(shift, ASSERT_MSG_BUFFER_ALLOC_FAILED); in ZTEST()
136 &output[index], &shift[index]); in ZTEST()
150 memcmp(shift, ref_divide_shift, in ZTEST()
156 free(shift); in ZTEST()
/Zephyr-Core-3.6.0/subsys/sensing/sensor/phy_3d_sensor/
Dphy_3d_sensor.c26 static int64_t shifted_q31_to_scaled_int64(q31_t q, int8_t shift, int64_t scale) in shifted_q31_to_scaled_int64() argument
31 shifted_value = (int64_t)q << shift; in shifted_q31_to_scaled_int64()
35 FIELD_GET(GENMASK64(31 + shift, 31), shifted_value) * scale + in shifted_q31_to_scaled_int64()
46 int8_t shift) in scaled_int64_to_shifted_q31() argument
48 return (q31_t)((val * BIT(31 - shift) / scale)); in scaled_int64_to_shifted_q31()
71 .shift = SENSING_ACCEL_Q31_SHIFT,
96 .shift = SENSING_GYRO_Q31_SHIFT,
200 sample->shift = custom->shift; in phy_3d_sensor_submit()
/Zephyr-Core-3.6.0/drivers/sensor/f75303/
Df75303_emul.c107 const q31_t *value, int8_t shift) in f75303_emul_set_channel() argument
132 scaled_value = (int64_t)*value << shift; in f75303_emul_set_channel()
143 q31_t *lower, q31_t *upper, q31_t *epsilon, int8_t *shift) in f75303_emul_get_sample_range() argument
151 *shift = 8; in f75303_emul_get_sample_range()
153 *upper = (int64_t)(255.875 * ((int64_t)INT32_MAX + 1)) >> *shift; in f75303_emul_get_sample_range()
154 *epsilon = (int64_t)(0.125 * ((int64_t)INT32_MAX + 1)) >> *shift; in f75303_emul_get_sample_range()
/Zephyr-Core-3.6.0/drivers/watchdog/
Dwdt_wwdgt_gd32.c83 for (uint32_t shift = 0U; shift <= WWDGT_PRESCALER_EXP_MAX; shift++) { in gd32_wwdgt_calc_window() local
84 uint32_t max_count = gd32_wwdgt_calc_ticks(dev, win->max, shift); in gd32_wwdgt_calc_window()
88 *prescaler = CFG_PSC(shift); in gd32_wwdgt_calc_window()
92 *wval = gd32_wwdgt_calc_ticks(dev, win->min, shift); in gd32_wwdgt_calc_window()
Dwdt_fwdgt_gd32.c57 uint8_t shift = 0U; in gd32_fwdgt_calc_timeout() local
62 shift++; in gd32_fwdgt_calc_timeout()
63 divider = 4U << shift; in gd32_fwdgt_calc_timeout()
66 if (!IS_VALID_FWDGT_PRESCALER(PSC_PSC(shift)) || timeout == 0U) { in gd32_fwdgt_calc_timeout()
71 *prescaler = PSC_PSC(shift); in gd32_fwdgt_calc_timeout()
Dwdt_iwdg_stm32.c67 uint8_t shift = 0U; in iwdg_stm32_convert_timeout() local
73 shift++; in iwdg_stm32_convert_timeout()
74 divider = 4U << shift; in iwdg_stm32_convert_timeout()
81 *prescaler = shift; in iwdg_stm32_convert_timeout()
/Zephyr-Core-3.6.0/include/zephyr/sensing/
Dsensing_datatypes.h69 int8_t shift; member
103 int8_t shift; member
/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/
Dstm32l1_clock.h50 #define STM32_CLOCK(val, mask, shift, reg) \ argument
52 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32f1_clock.h52 #define STM32_CLOCK(val, mask, shift, reg) \ argument
54 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32f4_clock.h63 #define STM32_CLOCK(val, mask, shift, reg) \ argument
65 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \
Dstm32c0_clock.h54 #define STM32_CLOCK(val, mask, shift, reg) \ argument
56 (((shift) & STM32_CLOCK_SHIFT_MASK) << STM32_CLOCK_SHIFT_SHIFT) | \

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