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/Zephyr-latest/scripts/
Dcheckstack.pl39 my $arch = shift;
40 if ($arch eq "") {
41 $arch = `uname -m`;
42 chomp($arch);
48 if ($arch eq 'aarch64') {
51 } elsif ($arch eq 'arm') {
54 } elsif ($arch eq 'avr32') {
58 } elsif ($arch =~ /^x86(_64)?$/ || $arch =~ /^i[3456]86$/) {
64 } elsif ($arch eq 'ia64') {
67 } elsif ($arch eq 'm68k') {
[all …]
Dlist_hardware.py222 if args.arch is not None:
224 lambda arch: arch.get('name') == args.arch, archs['archs']))}
225 for arch in archs['archs']:
226 arch.update({'path': root / 'arch' / arch['path']})
227 arch.update({'hwm': 'v2'})
228 arch.update({'type': 'arch'})
278 for arch in archs['archs']:
281 TYPE='TYPE;' + arch['type'],
282 NAME='NAME;' + arch['name'],
283 DIR='DIR;' + str(arch['path'].as_posix()),
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/Zephyr-latest/arch/riscv/core/
Dfpu.c39 buf[8] = '0' + _current->arch.exception_depth; in DBG()
46 v = *(unsigned char *)&th->arch.saved_fp_context; in DBG()
73 _current_cpu->arch.fpu_state = (status & MSTATUS_FS); in z_riscv_fpu_disable()
85 atomic_ptr_set(&_current_cpu->arch.fpu_owner, _current); in z_riscv_fpu_load()
89 z_riscv_fpu_restore(&_current->arch.saved_fp_context); in z_riscv_fpu_load()
108 struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner); in arch_flush_local_fpu()
111 bool dirty = (_current_cpu->arch.fpu_state == MSTATUS_FS_DIRTY); in arch_flush_local_fpu()
117 z_riscv_fpu_save(&owner->arch.saved_fp_context); in arch_flush_local_fpu()
121 owner->arch.fpu_recently_used = dirty; in arch_flush_local_fpu()
127 atomic_ptr_clear(&_current_cpu->arch.fpu_owner); in arch_flush_local_fpu()
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Dpmp.c322 thread->arch.m_mode_pmpaddr_regs, \
323 thread->arch.m_mode_pmpcfg_regs, \
324 ARRAY_SIZE(thread->arch.m_mode_pmpaddr_regs)
331 thread->arch.u_mode_pmpaddr_regs, \
332 thread->arch.u_mode_pmpcfg_regs, \
333 ARRAY_SIZE(thread->arch.u_mode_pmpaddr_regs)
486 if (thread->arch.priv_stack_start != 0) { in z_riscv_pmp_stackguard_prepare()
487 stack_bottom = thread->arch.priv_stack_start; in z_riscv_pmp_stackguard_prepare()
498 thread->arch.m_mode_pmp_end_index = index; in z_riscv_pmp_stackguard_prepare()
518 write_pmp_entries(global_pmp_end_index, thread->arch.m_mode_pmp_end_index, in z_riscv_pmp_stackguard_enable()
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Dthread.c70 thread->arch.exception_depth = 1; in arch_new_thread()
79 thread->arch.priv_stack_start = 0; in arch_new_thread()
144 _current->arch.priv_stack_start = in arch_user_mode_enter()
150 _current->arch.priv_stack_start = (unsigned long)_current->stack_obj; in arch_user_mode_enter()
152 top_of_priv_stack = Z_STACK_PTR_ALIGN(_current->arch.priv_stack_start + in arch_user_mode_enter()
158 (void)memset((void *)_current->arch.priv_stack_start, 0xaa, in arch_user_mode_enter()
189 arch_curr_cpu()->arch.user_exc_sp = top_of_priv_stack; in arch_user_mode_enter()
216 return z_stack_space_get((void *)thread->arch.priv_stack_start, *stack_size, unused_ptr); in arch_thread_priv_stack_space_get()
/Zephyr-latest/arch/arm/core/cortex_a_r/
Dthread.c113 thread->arch.basepri = 0; in arch_new_thread()
116 thread->arch.mode = 0; in arch_new_thread()
118 thread->arch.mode_exc_return = DEFAULT_EXC_RETURN; in arch_new_thread()
122 thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk; in arch_new_thread()
126 thread->arch.priv_stack_start = 0; in arch_new_thread()
137 thread->arch.exception_depth = 1; in arch_new_thread()
150 if ((thread->arch.mode & in z_arm_thread_stack_info_adjust()
153 thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk; in z_arm_thread_stack_info_adjust()
155 if (thread->arch.priv_stack_start) { in z_arm_thread_stack_info_adjust()
157 thread->arch.priv_stack_start += in z_arm_thread_stack_info_adjust()
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/Zephyr-latest/arch/arm/core/cortex_m/
Dthread.c109 thread->arch.basepri = 0; in arch_new_thread()
112 thread->arch.mode = 0; in arch_new_thread()
114 thread->arch.mode_exc_return = DEFAULT_EXC_RETURN; in arch_new_thread()
118 thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk; in arch_new_thread()
122 thread->arch.priv_stack_start = 0; in arch_new_thread()
137 if ((thread->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) == 0) { in z_arm_thread_stack_info_adjust()
139 thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk; in z_arm_thread_stack_info_adjust()
141 if (thread->arch.priv_stack_start) { in z_arm_thread_stack_info_adjust()
143 thread->arch.priv_stack_start += FP_GUARD_EXTRA_SIZE; in z_arm_thread_stack_info_adjust()
154 if ((thread->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) { in z_arm_thread_stack_info_adjust()
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/Zephyr-latest/arch/x86/core/ia32/
Dfloat.c135 z_do_fp_and_sse_regs_save(&thread->arch.preempFloatReg); in FpCtxSave()
139 z_do_fp_regs_save(&thread->arch.preempFloatReg); in FpCtxSave()
197 fp_owner = _kernel.cpus[0].arch.fpu_owner; in z_float_enable()
199 if ((fp_owner->arch.flags & X86_THREAD_FLAG_ALL) != 0) { in z_float_enable()
218 _kernel.cpus[0].arch.fpu_owner = thread; in z_float_enable()
233 _kernel.cpus[0].arch.fpu_owner = thread; in z_float_enable()
283 _kernel.cpus[0].arch.fpu_owner = (struct k_thread *)0; in z_float_disable()
285 if (_kernel.cpus[0].arch.fpu_owner == thread) { in z_float_disable()
286 _kernel.cpus[0].arch.fpu_owner = (struct k_thread *)0; in z_float_disable()
Dthread.c117 thread->arch.excNestCount = 0; in arch_new_thread()
119 thread->arch.flags = 0; in arch_new_thread()
128 thread->arch.preempFloatReg.floatRegsUnion.fpRegs.fcw = 0x037f; in arch_new_thread()
129 thread->arch.preempFloatReg.floatRegsUnion.fpRegs.ftw = 0xffff; in arch_new_thread()
131 thread->arch.preempFloatReg.floatRegsUnion.fpRegsEx.mxcsr = 0x1f80; in arch_new_thread()
/Zephyr-latest/arch/x86/core/intel64/
Dthread.c45 thread->arch.cs = X86_KERNEL_CS; in arch_new_thread()
46 thread->arch.ss = X86_KERNEL_DS; in arch_new_thread()
59 thread->arch.rdi = (long) entry; in arch_new_thread()
60 thread->arch.rsi = (long) p1; in arch_new_thread()
61 thread->arch.rdx = (long) p2; in arch_new_thread()
62 thread->arch.rcx = (long) p3; in arch_new_thread()
66 thread->arch.flags = X86_THREAD_FLAG_ALL; in arch_new_thread()
/Zephyr-latest/tests/arch/arm/arm_thread_swap/src/
Darm_thread_arch.c191 zassert_true(p_ztest_thread->arch.basepri == 0, in alt_thread_entry()
197 zassert_true(p_ztest_thread->arch.basepri == BASEPRI_MODIFIED_1, in alt_thread_entry()
201 zassert_true(p_ztest_thread->arch.swap_return_value == -EAGAIN, in alt_thread_entry()
225 zassert_true((_current->arch.mode_exc_return & EXC_RETURN_FTYPE) != 0, in alt_thread_entry()
231 zassert_true((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0, in alt_thread_entry()
243 zassert_true((p_ztest_thread->arch.mode_exc_return & EXC_RETURN_FTYPE) == 0, in alt_thread_entry()
245 p_ztest_thread->arch.mode); in alt_thread_entry()
251 verify_fp_callee_saved((const struct _preempt_float *)&p_ztest_thread->arch.preempt_float, in alt_thread_entry()
264 p_ztest_thread->arch.basepri = BASEPRI_MODIFIED_2; in alt_thread_entry()
270 p_ztest_thread->arch.swap_return_value = SWAP_RETVAL; in alt_thread_entry()
[all …]
/Zephyr-latest/arch/arm64/core/
Dfpu.c46 v = *(unsigned char *)&th->arch.saved_fp_context; in DBG()
71 struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner); in arch_flush_local_fpu()
81 z_arm64_fpu_save(&owner->arch.saved_fp_context); in arch_flush_local_fpu()
85 atomic_ptr_clear(&_current_cpu->arch.fpu_owner); in arch_flush_local_fpu()
105 if (atomic_ptr_get(&_kernel.cpus[i].arch.fpu_owner) != thread) { in flush_owned_fpu()
130 while (atomic_ptr_get(&_kernel.cpus[i].arch.fpu_owner) == thread) { in flush_owned_fpu()
238 struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner); in z_arm64_fpu_trap()
241 z_arm64_fpu_save(&owner->arch.saved_fp_context); in z_arm64_fpu_trap()
243 atomic_ptr_clear(&_current_cpu->arch.fpu_owner); in z_arm64_fpu_trap()
267 atomic_ptr_set(&_current_cpu->arch.fpu_owner, _current); in z_arm64_fpu_trap()
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/Zephyr-latest/scripts/coredump/gdbstubs/
D__init__.py7 from gdbstubs.arch.arm64 import GdbStub_ARM64
8 from gdbstubs.arch.arm_cortex_m import GdbStub_ARM_CortexM
9 from gdbstubs.arch.risc_v import GdbStub_RISC_V
10 from gdbstubs.arch.x86 import GdbStub_x86
11 from gdbstubs.arch.x86_64 import GdbStub_x86_64
12 from gdbstubs.arch.xtensa import GdbStub_Xtensa
/Zephyr-latest/cmake/modules/
Darch.cmake6 # Configure ARCH settings based on KConfig settings and arch root.
9 # on board directory and arch root.
11 # If no implementation is available for the current arch an error will be raised.
16 # - ARCH: Name of the arch in use.
17 # - ARCH_DIR: Directory containing the arch implementation.
21 # - ARCH_ROOT: CMake list of arch roots containing arch implementations
29 # HWMv2 obtains arch from Kconfig for the given Board / SoC variant because
30 # the Board / SoC path is no longer sufficient for determine the arch
31 # (read: multi-core and multi-arch SoC).
/Zephyr-latest/arch/x86/core/
Dpcie.c208 return 0x4000U | vector->arch.vector; in pcie_msi_mdr()
244 vectors[i].arch.irte = irte; in arch_pcie_msi_vectors_allocate()
245 vectors[i].arch.remap = true; in arch_pcie_msi_vectors_allocate()
271 vectors[i].arch.irq = irq; in arch_pcie_msi_vectors_allocate()
272 vectors[i].arch.vector = vector; in arch_pcie_msi_vectors_allocate()
275 vtd_set_irte_vector(vtd, vectors[i].arch.irte, in arch_pcie_msi_vectors_allocate()
276 vectors[i].arch.vector); in arch_pcie_msi_vectors_allocate()
277 vtd_set_irte_irq(vtd, vectors[i].arch.irte, in arch_pcie_msi_vectors_allocate()
278 vectors[i].arch.irq); in arch_pcie_msi_vectors_allocate()
279 vtd_set_irte_msi(vtd, vectors[i].arch.irte, true); in arch_pcie_msi_vectors_allocate()
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/Zephyr-latest/arch/arc/core/
Dthread.c62 thread->arch.priv_stack_start = in setup_stack_vars()
65 thread->arch.priv_stack_start = (uint32_t)(thread->stack_obj); in setup_stack_vars()
67 thread->arch.priv_stack_start += Z_ARC_STACK_GUARD_SIZE; in setup_stack_vars()
69 thread->arch.priv_stack_start = 0; in setup_stack_vars()
76 thread->arch.k_stack_top = thread->arch.priv_stack_start; in setup_stack_vars()
77 thread->arch.k_stack_base = (thread->arch.priv_stack_start + in setup_stack_vars()
79 thread->arch.u_stack_top = thread->stack_info.start; in setup_stack_vars()
80 thread->arch.u_stack_base = (thread->stack_info.start + in setup_stack_vars()
85 thread->arch.k_stack_top = (uint32_t)thread->stack_info.start; in setup_stack_vars()
86 thread->arch.k_stack_base = (uint32_t)(thread->stack_info.start + in setup_stack_vars()
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/Zephyr-latest/scripts/west_commands/runners/
Dtrace32.py32 arch: str,
36 self.arch = arch
74 if args.arch == 'auto':
75 arch = build_conf.get('CONFIG_ARCH').replace('"', '')
77 arch = arch.replace('arm64', 'arm')
79 arch = args.arch
80 return TRACE32BinaryRunner(cfg, args.config, arch, startup_args=args.startup_args,
/Zephyr-latest/scripts/logging/dictionary/dictionary_parser/
Ddata_types.py51 def get_stack_min_align(arch, is_tgt_64bit): argument
62 if arch == "arc":
70 elif arch == "arm64":
74 elif arch == "sparc":
78 elif arch == "x86":
86 elif arch == "riscv32e":
90 elif arch == "riscv":
98 elif arch == "nios2":
/Zephyr-latest/arch/arm/include/cortex_a_r/
Dkernel_arch_func.h43 _current->arch.basepri = key; in arch_swap()
44 _current->arch.swap_return_value = -EAGAIN; in arch_swap()
52 return _current->arch.swap_return_value; in arch_swap()
58 thread->arch.swap_return_value = value; in arch_thread_return_value_set()
/Zephyr-latest/soc/intel/raptor_lake/
Dlinker.ld6 #include <zephyr/arch/x86/memory.ld>
9 #include <zephyr/arch/x86/intel64/linker.ld>
11 #include <zephyr/arch/x86/ia32/linker.ld>
/Zephyr-latest/soc/intel/atom/
Dlinker.ld7 #include <zephyr/arch/x86/memory.ld>
10 #include <zephyr/arch/x86/intel64/linker.ld>
12 #include <zephyr/arch/x86/ia32/linker.ld>
/Zephyr-latest/arch/arm/include/cortex_m/
Dkernel_arch_func.h66 thread->arch.swap_return_value = value; in arch_thread_return_value_set()
85 _current->arch.basepri = key; in arch_swap()
86 _current->arch.swap_return_value = -EAGAIN; in arch_swap()
97 return _current->arch.swap_return_value; in arch_swap()
/Zephyr-latest/soc/intel/alder_lake/
Dlinker.ld8 #include <zephyr/arch/x86/memory.ld>
11 #include <zephyr/arch/x86/intel64/linker.ld>
13 #include <zephyr/arch/x86/ia32/linker.ld>
/Zephyr-latest/soc/intel/apollo_lake/
Dlinker.ld8 #include <zephyr/arch/x86/memory.ld>
11 #include <zephyr/arch/x86/intel64/linker.ld>
13 #include <zephyr/arch/x86/ia32/linker.ld>
/Zephyr-latest/soc/intel/elkhart_lake/
Dlinker.ld8 #include <zephyr/arch/x86/memory.ld>
11 #include <zephyr/arch/x86/intel64/linker.ld>
13 #include <zephyr/arch/x86/ia32/linker.ld>

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