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Searched refs:XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM (Results 1 – 8 of 8) sorted by relevance

/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/rt5xx/include/soc/
Dmemory.h34 #define XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM (XCHAL_INT_VECTOR_ADDR(0x1DC)) macro
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/imx8/include/
Dmemory.h54 #define XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM \ macro
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/imx8ulp/include/
Dmemory.h53 #define XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM \ macro
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/imx8m/include/
Dmemory.h59 #define XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM \ macro
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/rt5xx/
Dlinker.ld49 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE,
52 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM,
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/imx8/
Dlinker.ld60 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE,
63 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM,
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/imx8m/
Dlinker.ld60 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE,
63 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM,
/Zephyr-Core-3.6.0/soc/xtensa/nxp_adsp/imx8ulp/
Dlinker.ld60 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE,
63 org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM,