Home
last modified time | relevance | path

Searched refs:STM32_SRC_LSE (Results 1 – 25 of 32) sorted by relevance

12

/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/clock/
Dstm32_common_clocks.h12 #define STM32_SRC_LSE 0x002 macro
/Zephyr-Core-3.6.0/samples/boards/stm32/power_mgmt/serial_wakeup/boards/
Dnucleo_wl55jc.overlay11 <&rcc STM32_SRC_LSE LPUART1_SEL(3)>;
Dstm32l562e_dk.overlay24 <&rcc STM32_SRC_LSE LPUART1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/nucleo_wba52cg/
Dnucleo_wba52cg.dts92 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
134 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/nucleo_wba55cg/
Dnucleo_wba55cg.dts85 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
130 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/weact_stm32g431_core/
Dweact_stm32g431_core.dts119 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
125 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/stm32l562e_dk/
Dstm32l562e_dk_ns.dts33 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
Dstm32l562e_dk_common.dtsi76 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/drivers/clock_control/
Dclock_stm32_ll_common.c122 #if defined(STM32_SRC_LSE) in enabled_clock()
123 case STM32_SRC_LSE: in enabled_clock()
386 #if defined(STM32_SRC_LSE) in stm32_clock_control_get_subsys_rate()
387 case STM32_SRC_LSE: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_wba.c50 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()
232 case STM32_SRC_LSE: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_h5.c126 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()
256 case STM32_SRC_LSE: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_u5.c129 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()
269 case STM32_SRC_LSE: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_h7.c342 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()
486 case STM32_SRC_LSE: in stm32_clock_control_get_subsys_rate()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_lptim.c51 if (pclken[1].bus == STM32_SRC_LSE) { in ZTEST()
/Zephyr-Core-3.6.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/
Dg0_i2c1_hsi_lptim1_lse_adc1_pllp.overlay75 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
Dwb_i2c1_hsi_lptim1_lse.overlay81 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
Dl4_i2c1_hsi_lptim1_lse.overlay83 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
Dwl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay94 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/nucleo_c031c6/
Dnucleo_c031c6.dts91 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
/Zephyr-Core-3.6.0/boards/arm/nucleo_h563zi/
Dnucleo_h563zi-common.dtsi118 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
/Zephyr-Core-3.6.0/boards/arm/nucleo_g431rb/
Dnucleo_g431rb.dts153 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/b_l072z_lrwan1/
Db_l072z_lrwan1.dts152 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
/Zephyr-Core-3.6.0/boards/arm/b_u585i_iot02a/
Db_u585i_iot02a-common.dtsi78 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/nucleo_wb55rg/
Dnucleo_wb55rg.dts191 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
/Zephyr-Core-3.6.0/boards/arm/stm32h573i_dk/
Dstm32h573i_dk.dts183 <&rcc STM32_SRC_LSE RTC_SEL(1)>;

12