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Searched refs:SIFIVE_PINMUX_IOF1 (Results 1 – 5 of 5) sorted by relevance

/Zephyr-Core-3.6.0/boards/riscv/sparkfun_red_v_things_plus/
Dsparkfun_red_v_things_plus-pinctrl.dtsi40 pinmux = <0 SIFIVE_PINMUX_IOF1>;
43 pinmux = <1 SIFIVE_PINMUX_IOF1>;
46 pinmux = <2 SIFIVE_PINMUX_IOF1>;
49 pinmux = <3 SIFIVE_PINMUX_IOF1>;
54 pinmux = <20 SIFIVE_PINMUX_IOF1>;
57 pinmux = <19 SIFIVE_PINMUX_IOF1>;
60 pinmux = <21 SIFIVE_PINMUX_IOF1>;
63 pinmux = <22 SIFIVE_PINMUX_IOF1>;
68 pinmux = <10 SIFIVE_PINMUX_IOF1>;
71 pinmux = <11 SIFIVE_PINMUX_IOF1>;
[all …]
/Zephyr-Core-3.6.0/boards/riscv/hifive1_revb/
Dhifive1_revb-pinctrl.dtsi40 pinmux = <0 SIFIVE_PINMUX_IOF1>;
43 pinmux = <1 SIFIVE_PINMUX_IOF1>;
46 pinmux = <2 SIFIVE_PINMUX_IOF1>;
49 pinmux = <3 SIFIVE_PINMUX_IOF1>;
54 pinmux = <20 SIFIVE_PINMUX_IOF1>;
57 pinmux = <19 SIFIVE_PINMUX_IOF1>;
60 pinmux = <21 SIFIVE_PINMUX_IOF1>;
63 pinmux = <22 SIFIVE_PINMUX_IOF1>;
68 pinmux = <10 SIFIVE_PINMUX_IOF1>;
71 pinmux = <11 SIFIVE_PINMUX_IOF1>;
[all …]
/Zephyr-Core-3.6.0/boards/riscv/hifive1/
Dhifive1-pinctrl.dtsi40 pinmux = <0 SIFIVE_PINMUX_IOF1>;
43 pinmux = <1 SIFIVE_PINMUX_IOF1>;
46 pinmux = <2 SIFIVE_PINMUX_IOF1>;
49 pinmux = <3 SIFIVE_PINMUX_IOF1>;
54 pinmux = <20 SIFIVE_PINMUX_IOF1>;
57 pinmux = <19 SIFIVE_PINMUX_IOF1>;
60 pinmux = <21 SIFIVE_PINMUX_IOF1>;
63 pinmux = <22 SIFIVE_PINMUX_IOF1>;
68 pinmux = <10 SIFIVE_PINMUX_IOF1>;
71 pinmux = <11 SIFIVE_PINMUX_IOF1>;
[all …]
/Zephyr-Core-3.6.0/drivers/pinctrl/
Dpinctrl_sifive.c25 if (func > SIFIVE_PINMUX_IOF1 || pin >= MAX_PIN_NUM) { in pinctrl_sifive_set()
30 if (func == SIFIVE_PINMUX_IOF1) { in pinctrl_sifive_set()
31 val |= (SIFIVE_PINMUX_IOF1 << pin); in pinctrl_sifive_set()
33 val &= ~(SIFIVE_PINMUX_IOF1 << pin); in pinctrl_sifive_set()
/Zephyr-Core-3.6.0/include/zephyr/dt-bindings/pinctrl/
Dsifive-pinctrl.h11 #define SIFIVE_PINMUX_IOF1 0x01 macro