/Zephyr-Core-3.5.0/scripts/pylib/twister/twisterlib/ |
D | config_parser.py | 120 vs = v.split() 122 if len(vs) > 1: 128 return [self._cast_value(vsi, typestr[5:]) for vsi in vs] 130 return vs 138 vs = v.split() 140 if len(vs) > 1: 146 return {self._cast_value(vsi, typestr[4:]) for vsi in vs} 148 return set(vs)
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/Zephyr-Core-3.5.0/subsys/net/lib/lwm2m/ |
D | lwm2m_senml_cbor.cddl | 10 vs => tstr // ; String Value 28 vs = 3
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/Zephyr-Core-3.5.0/doc/hardware/peripherals/ |
D | espi.rst | 13 The technical advancements include lower voltage signal levels (1.8V vs. 3.3V), 14 lower pin count, and the frequency is twice as fast (66MHz vs. 33MHz)
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/Zephyr-Core-3.5.0/drivers/disk/nvme/ |
D | nvme_controller.c | 258 uint32_t cap_lo, cap_hi, to, vs, pmrcap; in nvme_controller_gather_info() local 282 vs = nvme_mmio_read_4(regs, vs); in nvme_controller_gather_info() 283 LOG_DBG("Version: 0x%08x: %d.%d", vs, in nvme_controller_gather_info() 284 NVME_MAJOR(vs), NVME_MINOR(vs)); in nvme_controller_gather_info()
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D | nvme.h | 17 uint32_t vs; /* version */ member 335 uint8_t vs[1024]; member
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/Zephyr-Core-3.5.0/boards/shields/st_b_lcd40_dsi1_mb1166/boards/ |
D | stm32h747i_disco_m7.overlay | 65 vs-active-high;
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/Zephyr-Core-3.5.0/doc/build/dts/ |
D | index.rst | 34 dt-vs-kconfig.rst
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/Zephyr-Core-3.5.0/boards/common/ |
D | openocd-nrf5.board.cmake | 3 # Infer nrf51 vs nrf52 etc from the BOARD name. This enforces a board
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/Zephyr-Core-3.5.0/doc/kernel/data_structures/ |
D | dlist.rst | 48 implementation that has zero overhead vs. the normal list processing). 64 prev/next pointers of a node vs. the list struct address.
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/Zephyr-Core-3.5.0/samples/net/sockets/echo_async_select/ |
D | README.rst | 55 the same except the header files are different for Zephyr vs POSIX, and
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/Zephyr-Core-3.5.0/samples/net/sockets/echo/ |
D | README.rst | 52 the same except the header files are different for Zephyr vs POSIX.)
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/Zephyr-Core-3.5.0/dts/arm/ti/ |
D | cc32xx.dtsi | 18 /* Note: Zephyr uses exception numbers, vs the IRQ #s used by the CC32XX SDK */
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/Zephyr-Core-3.5.0/samples/net/sockets/echo_async/ |
D | README.rst | 57 the same except the header files are different for Zephyr vs POSIX, and
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/Zephyr-Core-3.5.0/samples/net/sockets/dumb_http_server/ |
D | README.rst | 65 the same except the header files are different for Zephyr vs POSIX.)
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/Zephyr-Core-3.5.0/dts/arm/nxp/ |
D | nxp_rt1060.dtsi | 10 * FlexRAM mapped at 0x20280000 (vs 0x20280000 on rt1050) and is
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/Zephyr-Core-3.5.0/samples/net/sockets/http_get/ |
D | README.rst | 77 the same except the header files are different for Zephyr vs POSIX.)
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/Zephyr-Core-3.5.0/cmake/linker_script/common/ |
D | common-ram.cmake | 4 # ld align has been changed to subalign to provide identical behavior scatter vs. ld.
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D | common-rom.cmake | 14 # ld align has been changed to subalign to provide identical behavior scatter vs. ld.
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/Zephyr-Core-3.5.0/arch/x86/zefi/ |
D | README.txt | 22 binary into memory and copy it vs. a bootloader like grub that will
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/Zephyr-Core-3.5.0/boards/posix/native_sim/doc/ |
D | index.rst | 106 .. csv-table:: Drivers/backends vs libC choice
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/Zephyr-Core-3.5.0/doc/connectivity/networking/ |
D | net-stack-architecture.rst | 163 (:ref:`kernel <kernel_api>` vs. :ref:`userspace <usermode_api>`) and with different
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/Zephyr-Core-3.5.0/doc/develop/west/ |
D | basics.rst | 92 :ref:`are conceptually different <modules-vs-projects>`.
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/Zephyr-Core-3.5.0/boards/posix/doc/ |
D | bsim_boards_design.rst | 64 :ref:`comparison of what the POSIX arch provides vs other options<posix_arch_compare>`. 156 Overall architecture in a Zephyr application in an embedded target vs a bsim
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/Zephyr-Core-3.5.0/doc/releases/ |
D | release-notes-1.7.rst | 279 * ``ZEP-1347`` - sys_bitfield_*() take unsigned long* vs memaddr_t 313 * ``ZEP-1440`` - Kconfig choice for MINIMAL_LIBC vs NEWLIB_LIBC is not selectable
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/Zephyr-Core-3.5.0/doc/contribute/ |
D | external.rst | 240 :ref:`modules-vs-projects` for additional information on the differences.
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