| /Zephyr-Core-3.5.0/drivers/net/ |
| D | loopback.c | 69 int loopback_set_packet_drop_ratio(float ratio) in loopback_set_packet_drop_ratio() argument
71 if (ratio < 0.0f || ratio > 1.0f) { in loopback_set_packet_drop_ratio()
74 loopback_packet_drop_ratio = ratio; in loopback_set_packet_drop_ratio()
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| /Zephyr-Core-3.5.0/drivers/audio/ |
| D | dmic_nrfx_pdm.c | 102 uint8_t ratio, in is_better() argument
108 uint32_t act_rate = freq / ratio; in is_better()
112 LOG_DBG("Freq %u, ratio %u, act_rate %u", freq, ratio, act_rate); in is_better()
127 uint8_t ratio, in check_pdm_frequencies() argument
150 uint32_t req_freq = req_rate * ratio; in check_pdm_frequencies()
163 is_better(act_freq, ratio, req_rate, in check_pdm_frequencies()
198 if (is_better(freq_val, ratio, req_rate, in check_pdm_frequencies()
214 if ((freq_val / ratio) > req_rate) { in check_pdm_frequencies()
244 uint8_t ratio = ratios[r].ratio_val; in find_suitable_clock() local
246 if (check_pdm_frequencies(drv_cfg, config, pdm_cfg, ratio, in find_suitable_clock()
[all …]
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| /Zephyr-Core-3.5.0/drivers/sensor/stm32_vbat/ |
| D | stm32_vbat.c | 33 int ratio; member
83 voltage = voltage * cfg->ratio / 1000; /* value of SENSOR_CHAN_VOLTAGE in Volt */ in stm32_vbat_channel_get()
129 .ratio = DT_INST_PROP(inst, ratio), \
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| /Zephyr-Core-3.5.0/drivers/ethernet/ |
| D | eth_e1000.c | 404 static int ptp_clock_e1000_rate_adjust(const struct device *dev, double ratio) in ptp_clock_e1000_rate_adjust() argument
414 if (ratio == 1.0f) { in ptp_clock_e1000_rate_adjust()
418 ratio *= context->clk_ratio; in ptp_clock_e1000_rate_adjust()
421 if ((ratio > 1.0f + 1.0f/(2 * hw_inc)) || in ptp_clock_e1000_rate_adjust()
422 (ratio < 1.0f - 1.0f/(2 * hw_inc))) { in ptp_clock_e1000_rate_adjust()
427 context->clk_ratio = ratio; in ptp_clock_e1000_rate_adjust()
429 if (ratio < 1.0f) { in ptp_clock_e1000_rate_adjust()
431 val = 1.0f / (hw_inc * (1.0f - ratio)); in ptp_clock_e1000_rate_adjust()
432 } else if (ratio > 1.0f) { in ptp_clock_e1000_rate_adjust()
434 val = 1.0f / (hw_inc * (ratio - 1.0f)); in ptp_clock_e1000_rate_adjust()
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| D | eth_mcux.c | 1730 static int ptp_clock_mcux_rate_adjust(const struct device *dev, double ratio) in ptp_clock_mcux_rate_adjust() argument
1740 if ((ratio > 1.0 && ratio - 1.0 < 0.00000001) || in ptp_clock_mcux_rate_adjust()
1741 (ratio < 1.0 && 1.0 - ratio < 0.00000001)) { in ptp_clock_mcux_rate_adjust()
1745 ratio *= context->clk_ratio; in ptp_clock_mcux_rate_adjust()
1748 if ((ratio > 1.0 + 1.0/(2 * hw_inc)) || in ptp_clock_mcux_rate_adjust()
1749 (ratio < 1.0 - 1.0/(2 * hw_inc))) { in ptp_clock_mcux_rate_adjust()
1754 context->clk_ratio = ratio; in ptp_clock_mcux_rate_adjust()
1756 if (ratio < 1.0) { in ptp_clock_mcux_rate_adjust()
1758 val = 1.0 / (hw_inc * (1.0 - ratio)); in ptp_clock_mcux_rate_adjust()
1759 } else if (ratio > 1.0) { in ptp_clock_mcux_rate_adjust()
[all …]
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| /Zephyr-Core-3.5.0/drivers/adc/ |
| D | Kconfig.mcux | 51 bool "Divide ratio is 1"
54 bool "Divide ratio is 2"
57 bool "Divide ratio is 4"
60 bool "Divide ratio is 8"
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| D | adc_stm32.c | 546 static void adc_stm32_oversampling_ratioshift(ADC_TypeDef *adc, uint32_t ratio, uint32_t shift) in adc_stm32_oversampling_ratioshift() argument
552 if ((LL_ADC_GetOverSamplingRatio(adc) == ratio) in adc_stm32_oversampling_ratioshift()
558 LL_ADC_ConfigOverSamplingRatioShift(adc, ratio, shift); in adc_stm32_oversampling_ratioshift()
566 static int adc_stm32_oversampling(ADC_TypeDef *adc, uint8_t ratio) in adc_stm32_oversampling() argument
568 if (ratio == 0) { in adc_stm32_oversampling()
571 } else if (ratio < ARRAY_SIZE(table_oversampling_shift)) { in adc_stm32_oversampling()
578 uint32_t shift = table_oversampling_shift[ratio]; in adc_stm32_oversampling()
587 adc_stm32_oversampling_ratioshift(adc, 1 << ratio, shift); in adc_stm32_oversampling()
590 adc_stm32_oversampling_ratioshift(adc, table_oversampling_ratio[ratio], shift); in adc_stm32_oversampling()
594 adc_stm32_oversampling_ratioshift(adc, 1 << ratio, shift); in adc_stm32_oversampling()
[all …]
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| /Zephyr-Core-3.5.0/include/zephyr/net/ |
| D | loopback.h | 26 int loopback_set_packet_drop_ratio(float ratio);
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| /Zephyr-Core-3.5.0/drivers/watchdog/ |
| D | wdt_cc32xx.c | 43 static const uint32_t ratio = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / 1000; in wdt_cc32xx_msToTicks() local
44 static const uint32_t maxMs = MAX_RELOAD_VALUE / ratio; in wdt_cc32xx_msToTicks()
50 return ms * ratio; in wdt_cc32xx_msToTicks()
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| /Zephyr-Core-3.5.0/scripts/native_simulator/native/src/include/ |
| D | nsi_timer_model.h | 27 void hwtimer_set_rt_ratio(double ratio);
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| /Zephyr-Core-3.5.0/boards/posix/native_posix/ |
| D | timer_model.h | 28 void hwtimer_set_rt_ratio(double ratio);
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| D | timer_model.c | 304 void hwtimer_set_rt_ratio(double ratio) in hwtimer_set_rt_ratio() argument
306 clock_ratio = ratio; in hwtimer_set_rt_ratio()
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| /Zephyr-Core-3.5.0/boards/shields/ssd1306/ |
| D | sh1106_128x64.overlay | 24 multiplex-ratio = <63>;
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| D | ssd1306_128x64.overlay | 24 multiplex-ratio = <63>;
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| D | ssd1306_128x32.overlay | 24 multiplex-ratio = <31>;
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| D | ssd1306_128x64_spi.overlay | 25 multiplex-ratio = <63>;
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| /Zephyr-Core-3.5.0/drivers/timer/ |
| D | Kconfig.riscv_machine | 28 Specifies the division ratio of the system clock supplied to the Machine Timer.
37 The division ratio should define in devicetree,
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| D | Kconfig.stm32_lptim | 48 bool "Override tick to freq ratio check"
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| /Zephyr-Core-3.5.0/soc/arm/nuvoton_npcx/ |
| D | Kconfig | 108 prompt "Core clock to SPI flash clock ratio"
111 This sets the clock ratio (core clock / SPI clock)
114 bool "NPCX SPI clock ratio 1"
119 bool "NPCX SPI clock ratio 2"
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/ |
| D | ptp_clock.h | 29 int (*rate_adjust)(const struct device *dev, double ratio);
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| /Zephyr-Core-3.5.0/dts/arm/st/f0/ |
| D | stm32f031.dtsi | 58 ratio = <2>;
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| /Zephyr-Core-3.5.0/scripts/native_simulator/native/src/ |
| D | timer_model.c | 291 void hwtimer_set_rt_ratio(double ratio) in hwtimer_set_rt_ratio() argument
293 clock_ratio = ratio; in hwtimer_set_rt_ratio()
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| /Zephyr-Core-3.5.0/boards/posix/native_posix/doc/ |
| D | index.rst | 221 This can be controlled with the ``--rt-ratio=<ratio>`` and ``-rt-drift=<drift>``
224 ``ratio - 1``.
228 In this way if, for example, ``--rt-ratio=2`` is given, the simulated time
240 ``st = (rt - last_rt) * ratio + last_st``
244 ``rt = (st - last_st) / ratio + last_rt``
247 simulated time when the last clock ratio adjustment took place.
298 affected by the simulated time speed ratio.
309 as if the host was also affected by the clock speed ratio and offset
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/ |
| D | Kconfig.soc | 25 This divisor defines a ratio between processor clock (HCLK)
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| /Zephyr-Core-3.5.0/subsys/testsuite/ztest/src/ |
| D | ztress.c | 72 static void adjust_load(uint8_t ratio) in adjust_load() argument
75 uint32_t new_ticks = ratio * (uint32_t)backoff[i].ticks / 16; in adjust_load()
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