Searched refs:paddr (Results 1 – 13 of 13) sorted by relevance
| /Zephyr-Core-3.5.0/arch/xtensa/core/include/ |
| D | xtensa_mmu_priv.h | 28 #define Z_XTENSA_PTE(paddr, ring, attr) \ argument
29 (((paddr) & Z_XTENSA_PTE_PPN_MASK) | \
304 uint32_t paddr; in xtensa_dtlb_paddr_read() local
306 __asm__ volatile("rdtlb1 %0, %1\n\t" : "=a" (paddr) : "a" (entry)); in xtensa_dtlb_paddr_read()
307 return (paddr & Z_XTENSA_PTE_PPN_MASK); in xtensa_dtlb_paddr_read()
320 uint32_t paddr; in xtensa_itlb_paddr_read() local
322 __asm__ volatile("ritlb1 %0, %1\n\t" : "=a" (paddr), "+a" (entry)); in xtensa_itlb_paddr_read()
323 return (paddr & Z_XTENSA_PTE_PPN_MASK); in xtensa_itlb_paddr_read()
|
| /Zephyr-Core-3.5.0/soc/riscv/espressif_esp32/esp32c3/ |
| D | soc.h | 52 extern int esp_rom_Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
54 extern int esp_rom_Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
|
| /Zephyr-Core-3.5.0/soc/xtensa/espressif_esp32/esp32s3/ |
| D | soc.h | 68 extern int esp_rom_Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
70 extern int esp_rom_Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
|
| /Zephyr-Core-3.5.0/drivers/eeprom/ |
| D | eeprom_at2x.c | 425 uint8_t *paddr; in eeprom_at25_read() local
459 paddr = &cmd[1]; in eeprom_at25_read()
462 *paddr++ = offset >> 16; in eeprom_at25_read()
465 *paddr++ = offset >> 8; in eeprom_at25_read()
468 *paddr++ = offset; in eeprom_at25_read()
512 uint8_t *paddr; in eeprom_at25_write() local
529 paddr = &cmd[1]; in eeprom_at25_write()
532 *paddr++ = offset >> 16; in eeprom_at25_write()
535 *paddr++ = offset >> 8; in eeprom_at25_write()
538 *paddr++ = offset; in eeprom_at25_write()
|
| /Zephyr-Core-3.5.0/soc/xtensa/espressif_esp32/esp32s2/ |
| D | soc.h | 66 extern int esp_rom_Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
|
| /Zephyr-Core-3.5.0/arch/x86/ |
| D | gen_mmu.py | 477 for paddr in range(phys_base, phys_base + size, scope):
478 if is_identity_map and paddr == 0 and level == PT_LEVEL:
482 vaddr = virt_base + (paddr - phys_base)
484 self.map_page(vaddr, paddr, flags, False, level)
|
| /Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/tools/ |
| D | cavstool.py | 315 paddr = (struct.unpack("Q", pent)[0] & ((1 << 55) - 1)) * PAGESZ
317 return (mem, paddr, hugef)
|
| /Zephyr-Core-3.5.0/kernel/ |
| D | mmu.c | 464 uintptr_t paddr; in virt_to_page_frame() local
468 Z_PAGE_FRAME_FOREACH(paddr, pf) { in virt_to_page_frame()
|
| /Zephyr-Core-3.5.0/dts/xtensa/intel/ |
| D | intel_adsp_cavs25_tgph.dtsi | 202 paddr-size = <11>;
|
| D | intel_adsp_cavs25.dtsi | 216 paddr-size = <11>;
|
| D | intel_adsp_ace15_mtpm.dtsi | 607 paddr-size = <12>;
|
| D | intel_adsp_ace20_lnl.dtsi | 559 paddr-size = <12>;
|
| /Zephyr-Core-3.5.0/doc/releases/ |
| D | release-notes-3.2.rst | 1238 new ``paddr-size``, ``exec-bit-idx``, ``write-bit-idx`` properties.
|
