Searched refs:gctrl (Results 1 – 9 of 9) sorted by relevance
| /Zephyr-Core-3.5.0/boards/shields/st7789v_generic/ |
| D | st7789v_tl019fqv01.overlay | 28 gctrl = <0x35>;
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| D | st7789v_waveshare_240x240.overlay | 29 gctrl = <0x35>;
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| /Zephyr-Core-3.5.0/drivers/espi/ |
| D | espi_it8xxx2.c | 24 ((struct gctrl_it8xxx2_regs *)DT_REG_ADDR(DT_NODELABEL(gctrl)))
258 struct gctrl_it8xxx2_regs *const gctrl = ESPI_IT8XXX2_GET_GCTRL_BASE; in smfi_it8xxx2_init() local
264 gctrl->GCTRL_H2ROFSR = in smfi_it8xxx2_init()
265 (gctrl->GCTRL_H2ROFSR & ~IT8XXX2_ESPI_H2RAM_OFFSET_MASK) | in smfi_it8xxx2_init()
363 struct gctrl_it8xxx2_regs *const gctrl = ESPI_IT8XXX2_GET_GCTRL_BASE; in pnpcfg_it8xxx2_init() local
366 gctrl->GCTRL_BADRSEL = 0x1; in pnpcfg_it8xxx2_init()
513 struct gctrl_it8xxx2_regs *const gctrl = ESPI_IT8XXX2_GET_GCTRL_BASE; in port80_it8xxx2_isr() local
520 evt.evt_data = gctrl->GCTRL_P80HDR; in port80_it8xxx2_isr()
522 gctrl->GCTRL_P80H81HSR |= BIT(0); in port80_it8xxx2_isr()
530 struct gctrl_it8xxx2_regs *const gctrl = ESPI_IT8XXX2_GET_GCTRL_BASE; in port80_it8xxx2_init() local
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| /Zephyr-Core-3.5.0/drivers/display/ |
| D | display_st7789v.c | 32 uint8_t gctrl; member
292 tmp = config->gctrl;
435 .gctrl = DT_INST_PROP(inst, gctrl), \
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| /Zephyr-Core-3.5.0/drivers/gpio/ |
| D | gpio_kscan_ite_it8xxx2.c | 239 .reg_ksi_kso_gctrl = (uint8_t *)DT_INST_REG_ADDR_BY_NAME(inst, gctrl), \
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| /Zephyr-Core-3.5.0/dts/riscv/ite/ |
| D | it81xx2.dtsi | 23 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod";
36 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod";
49 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod";
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| D | it8xxx2.dtsi | 679 gctrl: general-control@f02000 { label
680 compatible = "ite,it8xxx2-gctrl";
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| /Zephyr-Core-3.5.0/boards/arm/pinetime_devkit0/ |
| D | pinetime_devkit0.dts | 194 gctrl = <0x35>;
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| /Zephyr-Core-3.5.0/soc/riscv/riscv-ite/common/ |
| D | chip_chipregs.h | 1439 ((struct gctrl_it8xxx2_regs *)DT_REG_ADDR(DT_NODELABEL(gctrl)))
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