Home
last modified time | relevance | path

Searched refs:blk_cfg (Results 1 – 14 of 14) sorted by relevance

/Zephyr-Core-3.5.0/drivers/spi/
Dspi_mcux_flexcomm.c377 struct dma_block_config *blk_cfg; in spi_mcux_dma_tx_load() local
387 blk_cfg = &stream->dma_blk_cfg[0]; in spi_mcux_dma_tx_load()
390 memset(blk_cfg, 0, sizeof(struct dma_block_config)); in spi_mcux_dma_tx_load()
401 blk_cfg->source_gather_en = 1; in spi_mcux_dma_tx_load()
402 blk_cfg->source_address = (uint32_t)&data->dummy_tx_buffer; in spi_mcux_dma_tx_load()
403 blk_cfg->dest_address = (uint32_t)&base->FIFOWR; in spi_mcux_dma_tx_load()
404 blk_cfg->block_size = (word_size > 8) ? in spi_mcux_dma_tx_load()
406 blk_cfg->next_block = &stream->dma_blk_cfg[1]; in spi_mcux_dma_tx_load()
407 blk_cfg->source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_mcux_dma_tx_load()
408 blk_cfg->dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_mcux_dma_tx_load()
[all …]
Dspi_ll_stm32.c135 struct dma_block_config *blk_cfg; in spi_stm32_dma_tx_load() local
141 blk_cfg = &stream->dma_blk_cfg; in spi_stm32_dma_tx_load()
144 memset(blk_cfg, 0, sizeof(struct dma_block_config)); in spi_stm32_dma_tx_load()
145 blk_cfg->block_size = len; in spi_stm32_dma_tx_load()
154 blk_cfg->source_address = (uint32_t)&dummy_rx_tx_buffer; in spi_stm32_dma_tx_load()
155 blk_cfg->source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_stm32_dma_tx_load()
157 blk_cfg->source_address = (uint32_t)buf; in spi_stm32_dma_tx_load()
159 blk_cfg->source_addr_adj = DMA_ADDR_ADJ_INCREMENT; in spi_stm32_dma_tx_load()
161 blk_cfg->source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_stm32_dma_tx_load()
165 blk_cfg->dest_address = ll_func_dma_get_reg_addr(cfg->spi, SPI_STM32_DMA_TX); in spi_stm32_dma_tx_load()
[all …]
Dspi_mcux_lpspi.c308 struct dma_block_config *blk_cfg; in spi_mcux_dma_tx_load() local
314 blk_cfg = &stream->dma_blk_cfg; in spi_mcux_dma_tx_load()
317 memset(blk_cfg, 0, sizeof(struct dma_block_config)); in spi_mcux_dma_tx_load()
323 blk_cfg->source_address = (uint32_t)&data->dummy_tx_buffer; in spi_mcux_dma_tx_load()
327 blk_cfg->source_address = (uint32_t)buf; in spi_mcux_dma_tx_load()
331 blk_cfg->source_gather_en = 1; in spi_mcux_dma_tx_load()
333 blk_cfg->dest_address = LPSPI_GetTxRegisterAddress(base); in spi_mcux_dma_tx_load()
334 blk_cfg->block_size = len; in spi_mcux_dma_tx_load()
351 struct dma_block_config *blk_cfg; in spi_mcux_dma_rx_load() local
357 blk_cfg = &stream->dma_blk_cfg; in spi_mcux_dma_rx_load()
[all …]
Dspi_xmc4xxx.c53 struct dma_block_config blk_cfg; member
402 dma_rx->blk_cfg.dest_address = (uint32_t)ctx->rx_buf; in spi_xmc4xxx_transceive_dma()
403 dma_rx->blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT; in spi_xmc4xxx_transceive_dma()
404 dma_rx->blk_cfg.block_size = dma_len; in spi_xmc4xxx_transceive_dma()
405 dma_rx->blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_xmc4xxx_transceive_dma()
428 dma_tx->blk_cfg.source_address = (uint32_t)ctx->tx_buf; in spi_xmc4xxx_transceive_dma()
429 dma_tx->blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT; in spi_xmc4xxx_transceive_dma()
431 dma_tx->blk_cfg.source_address = (uint32_t)&tx_dummy_data; in spi_xmc4xxx_transceive_dma()
432 dma_tx->blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_xmc4xxx_transceive_dma()
435 dma_tx->blk_cfg.block_size = dma_len; in spi_xmc4xxx_transceive_dma()
[all …]
/Zephyr-Core-3.5.0/drivers/dma/
Ddma_intel_adsp_hda.c35 struct dma_block_config *blk_cfg; in intel_adsp_hda_dma_host_in_config() local
47 blk_cfg = dma_cfg->head_block; in intel_adsp_hda_dma_host_in_config()
48 buf = (uint8_t *)(uintptr_t)(blk_cfg->source_address); in intel_adsp_hda_dma_host_in_config()
50 blk_cfg->block_size); in intel_adsp_hda_dma_host_in_config()
54 blk_cfg->block_size & HDA_ALIGN_MASK; in intel_adsp_hda_dma_host_in_config()
69 struct dma_block_config *blk_cfg; in intel_adsp_hda_dma_host_out_config() local
81 blk_cfg = dma_cfg->head_block; in intel_adsp_hda_dma_host_out_config()
82 buf = (uint8_t *)(uintptr_t)(blk_cfg->dest_address); in intel_adsp_hda_dma_host_out_config()
85 blk_cfg->block_size); in intel_adsp_hda_dma_host_out_config()
89 blk_cfg->block_size & HDA_ALIGN_MASK; in intel_adsp_hda_dma_host_out_config()
[all …]
/Zephyr-Core-3.5.0/subsys/mgmt/ec_host_cmd/backends/
Dec_host_cmd_backend_spi_stm32.c386 struct dma_block_config *blk_cfg; in spi_config_dma_tx() local
390 blk_cfg = &stream->dma_blk_cfg; in spi_config_dma_tx()
393 memset(blk_cfg, 0, sizeof(struct dma_block_config)); in spi_config_dma_tx()
394 blk_cfg->block_size = 0; in spi_config_dma_tx()
397 blk_cfg->dest_address = dma_dest_addr(spi); in spi_config_dma_tx()
398 blk_cfg->dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in spi_config_dma_tx()
400 blk_cfg->source_address = (uint32_t)hc_spi->tx_buf; in spi_config_dma_tx()
401 blk_cfg->source_addr_adj = DMA_ADDR_ADJ_INCREMENT; in spi_config_dma_tx()
403 blk_cfg->fifo_mode_control = hc_spi->dma_tx->fifo_threshold; in spi_config_dma_tx()
405 stream->dma_cfg.head_block = blk_cfg; in spi_config_dma_tx()
[all …]
/Zephyr-Core-3.5.0/drivers/i2s/
Di2s_mcux_flexcomm.c390 struct dma_block_config *blk_cfg; in i2s_mcux_config_dma_blocks() local
395 blk_cfg = &dev_data->rx_dma_blocks[0]; in i2s_mcux_config_dma_blocks()
396 memset(blk_cfg, 0, sizeof(dev_data->rx_dma_blocks)); in i2s_mcux_config_dma_blocks()
399 blk_cfg = &dev_data->tx_dma_block; in i2s_mcux_config_dma_blocks()
400 memset(blk_cfg, 0, sizeof(dev_data->tx_dma_block)); in i2s_mcux_config_dma_blocks()
403 stream->dma_cfg.head_block = blk_cfg; in i2s_mcux_config_dma_blocks()
407 blk_cfg->source_address = (uint32_t)&base->FIFORD; in i2s_mcux_config_dma_blocks()
408 blk_cfg->dest_address = (uint32_t)buffer[0]; in i2s_mcux_config_dma_blocks()
409 blk_cfg->block_size = block_size; in i2s_mcux_config_dma_blocks()
410 blk_cfg->next_block = &dev_data->rx_dma_blocks[1]; in i2s_mcux_config_dma_blocks()
[all …]
Di2s_ll_stm32.c480 struct dma_block_config blk_cfg; in start_dma() local
483 memset(&blk_cfg, 0, sizeof(blk_cfg)); in start_dma()
484 blk_cfg.block_size = blk_size; in start_dma()
485 blk_cfg.source_address = (uint32_t)src; in start_dma()
486 blk_cfg.dest_address = (uint32_t)dst; in start_dma()
488 blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT; in start_dma()
490 blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in start_dma()
493 blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT; in start_dma()
495 blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in start_dma()
497 blk_cfg.fifo_mode_control = fifo_threshold; in start_dma()
[all …]
Di2s_mcux_sai.c778 struct dma_block_config *blk_cfg = &strm->dma_block; in i2s_tx_stream_start() local
780 memset(blk_cfg, 0, sizeof(struct dma_block_config)); in i2s_tx_stream_start()
784 blk_cfg->dest_address = (uint32_t)&base->TDR[data_path]; in i2s_tx_stream_start()
785 blk_cfg->source_address = (uint32_t)buffer; in i2s_tx_stream_start()
786 blk_cfg->block_size = strm->cfg.block_size; in i2s_tx_stream_start()
787 blk_cfg->dest_scatter_en = 1; in i2s_tx_stream_start()
861 struct dma_block_config *blk_cfg = &strm->dma_block; in i2s_rx_stream_start() local
863 memset(blk_cfg, 0, sizeof(struct dma_block_config)); in i2s_rx_stream_start()
867 blk_cfg->dest_address = (uint32_t)buffer; in i2s_rx_stream_start()
868 blk_cfg->source_address = (uint32_t)&base->RDR[data_path]; in i2s_rx_stream_start()
[all …]
Di2s_sam_ssc.c184 struct dma_block_config blk_cfg; in start_dma() local
187 (void)memset(&blk_cfg, 0, sizeof(blk_cfg)); in start_dma()
188 blk_cfg.block_size = blk_size; in start_dma()
189 blk_cfg.source_address = (uint32_t)src; in start_dma()
190 blk_cfg.dest_address = (uint32_t)dst; in start_dma()
192 cfg->head_block = &blk_cfg; in start_dma()
/Zephyr-Core-3.5.0/drivers/serial/
Duart_stm32.c1427 data->dma_rx.blk_cfg.block_size = data->dma_rx.buffer_length; in uart_stm32_dma_replace_buffer()
1428 data->dma_rx.blk_cfg.dest_address = (uint32_t)data->dma_rx.buffer; in uart_stm32_dma_replace_buffer()
1433 data->dma_rx.blk_cfg.source_address, in uart_stm32_dma_replace_buffer()
1434 data->dma_rx.blk_cfg.dest_address, in uart_stm32_dma_replace_buffer()
1435 data->dma_rx.blk_cfg.block_size); in uart_stm32_dma_replace_buffer()
1510 data->dma_tx.blk_cfg.source_address = (uint32_t)data->dma_tx.buffer; in uart_stm32_async_tx()
1511 data->dma_tx.blk_cfg.block_size = data->dma_tx.buffer_length; in uart_stm32_async_tx()
1566 data->dma_rx.blk_cfg.block_size = buf_size; in uart_stm32_async_rx_enable()
1567 data->dma_rx.blk_cfg.dest_address = (uint32_t)data->dma_rx.buffer; in uart_stm32_async_rx_enable()
1699 memset(&data->dma_rx.blk_cfg, 0, sizeof(data->dma_rx.blk_cfg)); in uart_stm32_async_init()
[all …]
Duart_xmc4xxx.c44 struct dma_block_config blk_cfg; member
567 data->dma_rx.blk_cfg.source_address = (uint32_t)&config->uart->OUTR; in uart_xmc4xxx_async_init()
569 data->dma_rx.blk_cfg.source_address = (uint32_t)&config->uart->RBUF; in uart_xmc4xxx_async_init()
572 data->dma_rx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in uart_xmc4xxx_async_init()
573 data->dma_rx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT; in uart_xmc4xxx_async_init()
574 data->dma_rx.dma_cfg.head_block = &data->dma_rx.blk_cfg; in uart_xmc4xxx_async_init()
586 data->dma_tx.blk_cfg.dest_address = (uint32_t)&config->uart->IN[0]; in uart_xmc4xxx_async_init()
588 data->dma_tx.blk_cfg.dest_address = (uint32_t)&config->uart->TBUF[0]; in uart_xmc4xxx_async_init()
591 data->dma_tx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT; in uart_xmc4xxx_async_init()
592 data->dma_tx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in uart_xmc4xxx_async_init()
[all …]
Duart_stm32.h74 struct dma_block_config blk_cfg; member
/Zephyr-Core-3.5.0/drivers/adc/
Dadc_stm32.c224 struct dma_block_config *blk_cfg; in adc_stm32_dma_start() local
229 blk_cfg = &dma->dma_blk_cfg; in adc_stm32_dma_start()
232 blk_cfg->block_size = channel_count * sizeof(int16_t); in adc_stm32_dma_start()
235 blk_cfg->source_address = (uint32_t)LL_ADC_DMA_GetRegAddr(adc, LL_ADC_DMA_REG_REGULAR_DATA); in adc_stm32_dma_start()
236 blk_cfg->source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in adc_stm32_dma_start()
237 blk_cfg->source_reload_en = 0; in adc_stm32_dma_start()
239 blk_cfg->dest_address = (uint32_t)buffer; in adc_stm32_dma_start()
240 blk_cfg->dest_addr_adj = DMA_ADDR_ADJ_INCREMENT; in adc_stm32_dma_start()
241 blk_cfg->dest_reload_en = 0; in adc_stm32_dma_start()
246 blk_cfg->fifo_mode_control = 0; in adc_stm32_dma_start()
[all …]