1427 	data->dma_rx.blk_cfg.block_size = data->dma_rx.buffer_length;  in uart_stm32_dma_replace_buffer()
1428 	data->dma_rx.blk_cfg.dest_address = (uint32_t)data->dma_rx.buffer;  in uart_stm32_dma_replace_buffer()
1433 			data->dma_rx.blk_cfg.source_address,  in uart_stm32_dma_replace_buffer()
1434 			data->dma_rx.blk_cfg.dest_address,  in uart_stm32_dma_replace_buffer()
1435 			data->dma_rx.blk_cfg.block_size);  in uart_stm32_dma_replace_buffer()
1510 	data->dma_tx.blk_cfg.source_address = (uint32_t)data->dma_tx.buffer;  in uart_stm32_async_tx()
1511 	data->dma_tx.blk_cfg.block_size = data->dma_tx.buffer_length;  in uart_stm32_async_tx()
1566 	data->dma_rx.blk_cfg.block_size = buf_size;  in uart_stm32_async_rx_enable()
1567 	data->dma_rx.blk_cfg.dest_address = (uint32_t)data->dma_rx.buffer;  in uart_stm32_async_rx_enable()
1699 	memset(&data->dma_rx.blk_cfg, 0, sizeof(data->dma_rx.blk_cfg));  in uart_stm32_async_init()
1705 	data->dma_rx.blk_cfg.source_address =  in uart_stm32_async_init()
1708 	data->dma_rx.blk_cfg.source_address =  in uart_stm32_async_init()
1713 	data->dma_rx.blk_cfg.dest_address = 0; /* dest not ready */  in uart_stm32_async_init()
1716 		data->dma_rx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT;  in uart_stm32_async_init()
1718 		data->dma_rx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE;  in uart_stm32_async_init()
1722 		data->dma_rx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT;  in uart_stm32_async_init()
1724 		data->dma_rx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE;  in uart_stm32_async_init()
1728 	data->dma_rx.blk_cfg.source_reload_en  = 0;  in uart_stm32_async_init()
1729 	data->dma_rx.blk_cfg.dest_reload_en = 0;  in uart_stm32_async_init()
1730 	data->dma_rx.blk_cfg.fifo_mode_control = data->dma_rx.fifo_threshold;  in uart_stm32_async_init()
1732 	data->dma_rx.dma_cfg.head_block = &data->dma_rx.blk_cfg;  in uart_stm32_async_init()
1738 	memset(&data->dma_tx.blk_cfg, 0, sizeof(data->dma_tx.blk_cfg));  in uart_stm32_async_init()
1744 	data->dma_tx.blk_cfg.dest_address =  in uart_stm32_async_init()
1747 	data->dma_tx.blk_cfg.dest_address =  in uart_stm32_async_init()
1752 	data->dma_tx.blk_cfg.source_address = 0; /* not ready */  in uart_stm32_async_init()
1755 		data->dma_tx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT;  in uart_stm32_async_init()
1757 		data->dma_tx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE;  in uart_stm32_async_init()
1761 		data->dma_tx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT;  in uart_stm32_async_init()
1763 		data->dma_tx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE;  in uart_stm32_async_init()
1766 	data->dma_tx.blk_cfg.fifo_mode_control = data->dma_tx.fifo_threshold;  in uart_stm32_async_init()
1768 	data->dma_tx.dma_cfg.head_block = &data->dma_tx.blk_cfg;  in uart_stm32_async_init()