SHIM_LDOCTL_HPSRAM_LDO_ON (reference) in projects: Zephyr-Core-3.5.0

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/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/
D	asm_ldo_management.h	`14 #define SHIM_LDOCTL_HPSRAM_LDO_ON (3 << 0 \| 3 << 16) macro 61 movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_ON \| SHIM_LDOCTL_LPSRAM_LDO_ON)`
D	sram.c	`34 CAVS_SHIM.ldoctl = SHIM_LDOCTL_HPSRAM_LDO_ON; in hp_sram_pm_banks()`
D	power_down_cavs.S	`88 movi temp_reg0, SHIM_LDOCTL_HPSRAM_LDO_ON`
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/
D	adsp_shim.h	`145 #define SHIM_LDOCTL_HPSRAM_LDO_ON (3 << 0) macro`
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/include/intel_tgl_adsp/
D	adsp_shim.h	`114 #define SHIM_LDOCTL_HPSRAM_LDO_ON (3 << 0 \| 3 << 16) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
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canopennode-2.7.6
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chre-3.4.0
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cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
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