SHIM_LDOCTL_HPSRAM_LDO_BYPASS (reference) in projects: Zephyr-Core-3.5.0

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Searched refs:SHIM_LDOCTL_HPSRAM_LDO_BYPASS (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/
D	asm_ldo_management.h	`18 #define SHIM_LDOCTL_HPSRAM_LDO_BYPASS (BIT(0) \| BIT(16)) macro 100 movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_BYPASS \| SHIM_LDOCTL_LPSRAM_LDO_BYPASS)`
D	sram.c	`94 CAVS_SHIM.ldoctl = SHIM_LDOCTL_HPSRAM_LDO_BYPASS; in hp_sram_pm_banks()`
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/
D	adsp_shim.h	`146 #define SHIM_LDOCTL_HPSRAM_LDO_BYPASS BIT(0) macro`
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/include/intel_tgl_adsp/
D	adsp_shim.h	`115 #define SHIM_LDOCTL_HPSRAM_LDO_BYPASS BIT(16) macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
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