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Searched refs:Reset (Results 1 – 25 of 188) sorted by relevance

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/Zephyr-Core-3.5.0/drivers/reset/
DKconfig1 # Reset Controller driver configuration options
7 # Reset Controller options
10 bool "Reset Controller drivers"
12 Reset Controller drivers. Reset node represents a region containing
20 int "Reset Controller driver init priority"
28 comment "Reset Controller Drivers"
DKconfig.intel_socfpga5 bool "Intel SoC FPGA Reset Controller driver"
9 Enable the Reset driver for Intel SoC FPGA device
DKconfig.stm325 bool "STM32 Reset Controller Driver"
DKconfig.gd325 bool "GD32 Reset Controller Driver"
DKconfig.rpi_pico5 bool "Raspberry Pi Reset Controller driver"
DKconfig.numaker1 # Nuvoton NuMaker Reset Controller configuration options
/Zephyr-Core-3.5.0/drivers/pwm/
DKconfig.imx14 int "Loop count for PWM Software Reset"
18 Loop count for PWM Software Reset when disabling PWM channel.
/Zephyr-Core-3.5.0/doc/hardware/peripherals/
Dreset.rst3 Reset Controller
9 Reset controllers are units that control the reset signals to multiple
Dhwinfo.rst12 Reset cause flags can be used to determine why the device was reset; for
/Zephyr-Core-3.5.0/drivers/clock_control/
DKconfig.gd329 Enable driver for Gigadevice Reset Clock Unit (RCU).
DKconfig.beetle13 Enable driver for Reset & Clock Control subsystem found
DKconfig.lpc11u6x7 bool "LPC11U6X Reset and clock control"
/Zephyr-Core-3.5.0/soc/arm/nxp_s32/
DKconfig14 int "Functional Reset Escalation threshold"
25 int "Destructive Reset Escalation threshold"
/Zephyr-Core-3.5.0/tests/bsim/bluetooth/ll/edtt/tests_scripts/
Dhci.llcp.test_list28 HCI/DSU/BV-03-C # [Reset Command received in Slave Role]
31 HCI/DSU/BV-06-C # [Reset Command received in Master Role]
/Zephyr-Core-3.5.0/samples/net/wpanusb/
Dwpan-radio-spec.txt21 Opcode 0x00 - Reset bRequest
23 Reset the Radio
/Zephyr-Core-3.5.0/boards/arm/stm32h7b3i_dk/support/
Dopenocd.cfg14 # Reset configuration
/Zephyr-Core-3.5.0/boards/arm64/intel_socfpga_agilex5_socdk/
Dintel_socfpga_agilex5_socdk_defconfig35 # Reset Manager
/Zephyr-Core-3.5.0/samples/subsys/ipc/ipc_service/icmsg/
DREADME.rst30 Reset the board and the following message will appear on the corresponding
42 [00:00:01.917,297] <inf> host: Reset IPC service
/Zephyr-Core-3.5.0/boards/arm/b_u585i_iot02a/support/
Dopenocd.cfg19 # Reset configuration
/Zephyr-Core-3.5.0/boards/arm/nucleo_u575zi_q/support/
Dopenocd.cfg19 # Reset configuration
/Zephyr-Core-3.5.0/boards/arm/nucleo_u5a5zj_q/support/
Dopenocd.cfg19 # Reset configuration
/Zephyr-Core-3.5.0/boards/arm/rcar_h3_salvatorx/support/
Dopenocd.cfg31 # Software Reset Register 2 Bit(22) Arm Realtime core
34 # Software Reset Clearing Register 2 Bit(22) Arm Realtime core
/Zephyr-Core-3.5.0/boards/arm/rcar_h3ulcb/support/
Dopenocd.cfg31 # Software Reset Register 2 Bit(22) Arm Realtime core
34 # Software Reset Clearing Register 2 Bit(22) Arm Realtime core
/Zephyr-Core-3.5.0/boards/arm/v2m_beetle/support/
Dopenocd.cfg38 # Reset the peripherals and the core
/Zephyr-Core-3.5.0/boards/arm64/intel_socfpga_agilex5_socdk/doc/
Dindex.rst40 | Reset | on-chip | Intel Corporation, SoCFPGA Reset controller |

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