Home
last modified time | relevance | path

Searched refs:GD32_RESET_SPI2 (Results 1 – 7 of 7) sorted by relevance

/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/reset/
Dgd32vf103.h51 #define GD32_RESET_SPI2 GD32_RESET_CONFIG(APB1RST, 15U) macro
Dgd32e10x.h58 #define GD32_RESET_SPI2 GD32_RESET_CONFIG(APB1RST, 15U) macro
Dgd32f403.h59 #define GD32_RESET_SPI2 GD32_RESET_CONFIG(APB1RST, 15U) macro
Dgd32e50x.h64 #define GD32_RESET_SPI2 GD32_RESET_CONFIG(APB1RST, 15U) macro
Dgd32f4xx.h74 #define GD32_RESET_SPI2 GD32_RESET_CONFIG(APB1RST, 15U) macro
/Zephyr-Core-3.5.0/dts/arm/gigadevice/gd32f403/
Dgd32f403.dtsi146 resets = <&rctl GD32_RESET_SPI2>;
/Zephyr-Core-3.5.0/dts/arm/gigadevice/gd32f4xx/
Dgd32f4xx.dtsi220 resets = <&rctl GD32_RESET_SPI2>;