| /Zephyr-Core-3.4.0/drivers/misc/ft8xx/ |
| D | ft8xx.c | 43 uint8_t pclk; member
55 .pclk = DT_INST_PROP(0, pclk),
165 ft8xx_wr8(FT800_REG_PCLK, config->pclk); in ft8xx_init()
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| /Zephyr-Core-3.4.0/drivers/watchdog/ |
| D | wdt_wwdgt_gd32.c | 57 uint32_t pclk; in gd32_wwdgt_calc_ticks() local
61 &pclk); in gd32_wwdgt_calc_ticks()
63 return ((timeout * pclk) in gd32_wwdgt_calc_ticks()
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| /Zephyr-Core-3.4.0/soc/riscv/riscv-privileged/sifive-freedom/ |
| D | soc.h | 49 DT_PROP(DT_NODELABEL(pclk), clock_frequency)
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| D | fu740_clock.c | 15 BUILD_ASSERT(KHZ(125125) == DT_PROP(DT_NODELABEL(pclk), clock_frequency),
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| /Zephyr-Core-3.4.0/drivers/pwm/ |
| D | pwm_b91.c | 31 pwm_clk_div = sys_clk.pclk * 1000 * 1000 / config->clock_frequency - 1; in pwm_b91_init()
106 *cycles = sys_clk.pclk * 1000 * 1000 / (reg_pwm_clkdiv + 1); in pwm_b91_get_cycles_per_sec()
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| /Zephyr-Core-3.4.0/boards/shields/ftdi_vm800c/ |
| D | ftdi_vm800c.overlay | 21 pclk = <5>;
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| /Zephyr-Core-3.4.0/drivers/serial/ |
| D | uart_ns16550.c | 359 static void set_baud_rate(const struct device *dev, uint32_t baud_rate, uint32_t pclk) argument
366 if ((baud_rate != 0U) && (pclk != 0U)) {
371 divisor = ((pclk + (baud_rate << 3))
393 uint32_t pclk = 0U; local
429 pclk = dev_cfg->sys_clk_freq;
437 &pclk);
440 set_baud_rate(dev, cfg->baudrate, pclk);
1038 uint32_t mdc, chg, pclk = 0U; local
1042 pclk = dev_cfg->sys_clk_freq;
1045 clock_control_get_rate(dev_cfg->clock_dev, dev_cfg->clock_subsys, &pclk);
[all …]
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| D | uart_b91.c | 140 static void uart_b91_cal_div_and_bwpc(uint32_t baudrate, uint32_t pclk, in uart_b91_cal_div_and_bwpc() argument
149 primeInt = pclk / baudrate; in uart_b91_cal_div_and_bwpc()
150 primeDec = 10 * pclk / baudrate - 10 * primeInt; in uart_b91_cal_div_and_bwpc()
283 uart_b91_cal_div_and_bwpc(cfg->baudrate, sys_clk.pclk * 1000 * 1000, ÷r, &bwpc); in uart_b91_configure()
324 uart_b91_cal_div_and_bwpc(cfg->baud_rate, sys_clk.pclk * 1000 * 1000, ÷r, &bwpc); in uart_b91_driver_init()
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| D | uart_lpc11u6x.c | 82 uint32_t pclk; in lpc11u6x_uart0_config_baudrate() local
90 &pclk); in lpc11u6x_uart0_config_baudrate()
91 mul = pclk / (pclk % LPC11U6X_UART0_CLK); in lpc11u6x_uart0_config_baudrate()
93 dl = pclk / (16 * baudrate + 16 * baudrate / mul); in lpc11u6x_uart0_config_baudrate()
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| /Zephyr-Core-3.4.0/drivers/spi/ |
| D | spi_pl022.c | 269 #define MAX_FREQ_CONTROLLER_MODE(cfg) (cfg->pclk / 2)
270 #define MAX_FREQ_PERIPHERAL_MODE(cfg) (cfg->pclk / 12)
274 const uint32_t pclk; member
304 static inline uint32_t spi_pl022_calc_prescale(const uint32_t pclk, const uint32_t baud) in spi_pl022_calc_prescale() argument
310 if (pclk < (prescale + 2) * CPSDVR_MAX * baud) { in spi_pl022_calc_prescale()
318 static inline uint32_t spi_pl022_calc_postdiv(const uint32_t pclk, in spi_pl022_calc_postdiv() argument
324 if (pclk / (prescale * (postdiv - 1)) > baud) { in spi_pl022_calc_postdiv()
376 prescale = spi_pl022_calc_prescale(cfg->pclk, spicfg->frequency); in spi_pl022_configure()
377 postdiv = spi_pl022_calc_postdiv(cfg->pclk, spicfg->frequency, prescale); in spi_pl022_configure()
970 .pclk = DT_INST_PROP_BY_PHANDLE(idx, clocks, clock_frequency), \
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| D | spi_b91.c | 302 uint8_t clk_src = b91_config->peripheral_id == PSPI_MODULE ? sys_clk.pclk : sys_clk.hclk; in spi_b91_config()
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| /Zephyr-Core-3.4.0/drivers/i2c/ |
| D | i2c_b91.c | 69 i2c_set_master_clk((unsigned char)(sys_clk.pclk * 1000 * 1000 / (4 * i2c_speed))); in i2c_b91_configure()
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| /Zephyr-Core-3.4.0/dts/arm64/fvp/ |
| D | fvp-aemv8r.dtsi | 53 uartclk: apb-pclk {
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| /Zephyr-Core-3.4.0/drivers/counter/ |
| D | counter_gd32_timer.c | 431 uint32_t pclk; in counter_gd32_timer_init() local
436 (clock_control_subsys_t)&cfg->clkid, &pclk); in counter_gd32_timer_init()
438 data->freq = pclk / (cfg->prescaler + 1); in counter_gd32_timer_init()
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| /Zephyr-Core-3.4.0/boards/arm64/fvp_base_revc_2xaemv8a/ |
| D | fvp_base_revc_2xaemv8a.dts | 73 uartclk: apb-pclk {
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| /Zephyr-Core-3.4.0/dts/arm64/qemu/ |
| D | qemu-virt-arm64.dtsi | 55 uartclk: apb-pclk {
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| D | qemu-virt-a53.dtsi | 55 uartclk: apb-pclk {
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| /Zephyr-Core-3.4.0/dts/riscv/sifive/ |
| D | riscv64-fu740.dtsi | 23 pclk: p-clk { label
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