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Searched refs:lr (Results 1 – 25 of 52) sorted by relevance

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/Zephyr-Core-3.4.0/arch/arc/core/dsp/
Dswap_dsp_macros.h16 lr r13, [_ARC_V2_DSP_CTRL]
18 lr r13, [_ARC_V2_ACC0_GLO]
20 lr r13, [_ARC_V2_ACC0_GHI]
23 lr r13, [_ARC_V2_DSP_BFLY0]
25 lr r13, [_ARC_V2_DSP_FFT_CTRL]
42 lr r13, [_ARC_V2_AGU_AP0]
44 lr r13, [_ARC_V2_AGU_AP1]
46 lr r13, [_ARC_V2_AGU_AP2]
48 lr r13, [_ARC_V2_AGU_AP3]
50 lr r13, [_ARC_V2_AGU_OS0]
[all …]
/Zephyr-Core-3.4.0/arch/arm/core/aarch32/
Dcpu_idle.S49 bx lr
53 push {r0, lr}
71 mov lr, r1
73 pop {r0, lr}
80 push {r0, lr}
84 mov lr, r1
86 pop {r0, lr}
129 bx lr
133 push {r0, lr}
137 mov lr, r1
[all …]
Dswap_helper.S65 push {r0, lr}
69 mov lr, r1
71 pop {r0, lr}
81 strb lr, [r2, #_thread_offset_to_mode_exc_return]
108 tst lr, #_EXC_RETURN_FTYPE_Msk
250 ldrsb lr, [r2, #_thread_offset_to_mode_exc_return]
287 push {r2,lr}
291 mov lr, r3
335 tst lr, #_EXC_RETURN_FTYPE_Msk
364 push {r2,lr}
[all …]
Disr_wrapper.S49 push {r0,lr} /* r0, lr are now the first items on the stack */
86 sub lr, lr, #4
89 push {r0-r3, r12, lr}
133 push {lr}
278 mov lr, r3
280 pop {r0, lr}
Duserspace.S48 mov lr, r0
111 push {r1,r2,r3,lr}
184 mov lr, r4
188 pop {r1,r2,r3,lr}
245 mov r0, lr
348 mov r1, lr
364 str lr, [ip, #4]
373 push {ip, lr}
405 mov lr, r1
414 push {r1,lr}
[all …]
/Zephyr-Core-3.4.0/arch/riscv/core/
Disr.S122 lr sp, _curr_cpu_arch_user_exc_sp(s0)
130 lr t0, ___cpu_t_current_OFFSET(s0)
131 lr tp, _thread_offset_to_tls(t0)
139 lr t0, _curr_cpu_arch_user_exc_tmp0(s0)
140 lr t1, _curr_cpu_arch_user_exc_tmp1(s0)
245 lr t0, ___cpu_t_current_OFFSET(s0)
321 lr t0, __z_arch_esf_t_mepc_OFFSET(sp)
334 lr t0, __z_arch_esf_t_t0_OFFSET(sp)
347 lr a0, __z_arch_esf_t_a0_OFFSET(sp)
348 lr a1, __z_arch_esf_t_a1_OFFSET(sp)
[all …]
Dswitch.S50 lr sp, _thread_offset_to_sp(a0)
54 lr tp, _thread_offset_to_tls(a0)
91 DO_CALLEE_SAVED(lr, a0)
Dreset.S97 lr t0, 0(t0)
102 lr sp, 0(t0)
/Zephyr-Core-3.4.0/arch/arc/core/
Dfast_irq.S55 lr r2, [_ARC_V2_SEC_STAT]
60 lr r2, [_ARC_V2_STATUS32]
73 lr r24, [_ARC_V2_LP_START]
74 lr r25, [_ARC_V2_LP_END]
94 lr r1, [_ARC_V2_STATUS32]
114 lr ilink, [_ARC_V2_STATUS32]
117 lr sp, [_ARC_V2_USER_SP]
205 lr r0, [_ARC_V2_AUX_IRQ_ACT]
208 lr r0, [_ARC_V2_STATUS32]
216 lr r0, [_ARC_V2_STATUS32]
[all …]
Dreset.S76 lr r0, [_ARC_V2_STATUS32]
81 lr r0, [_ARC_V2_STATUS32]
87 lr r0, [_ARC_V2_STATUS32]
93 lr r0, [_ARC_V2_I_CACHE_BUILD]
106 lr r3, [_ARC_V2_D_CACHE_BUILD]
136 lr r3, [_ARC_V2_MPU_BUILD]
Disr_wrapper.S214 lr r0, [_ARC_V2_AUX_IRQ_ACT]
222 lr r0, [_ARC_V2_STATUS32_P0]
290 lr r0, [_ARC_V2_ICAUSE]
292 lr r3, [_ARC_V2_AUX_IRQ_HINT]
/Zephyr-Core-3.4.0/arch/arm64/core/
Dcpu_idle.S20 str lr, [sp, #-16]!
22 ldr lr, [sp], #16
32 stp x0, lr, [sp, #-16]!
34 ldp x0, lr, [sp], #16
Dswitch.S53 stp x4, lr, [x1, #_thread_offset_to_callee_saved_sp_elx_lr]
108 ldp x4, lr, [x0, #_thread_offset_to_callee_saved_sp_elx_lr]
119 str lr, [sp, #-16]!
121 ldr lr, [sp], #16
125 str lr, [sp, #-16]!
127 ldr lr, [sp], #16
/Zephyr-Core-3.4.0/arch/arm/core/aarch32/cortex_m/
Dexc_exit.S88 push {r0, lr}
92 mov lr, r1
94 pop {r0, lr}
98 bx lr
Dpm_s2ram.S30 push {r4-r12, lr}
91 pop {r4-r12, lr}
92 bx lr
104 bx lr
153 pop {r4-r12, lr}
159 bx lr
Dcoredump.c21 uint32_t lr; member
71 arch_blk.r.lr = esf->basic.lr; in arch_coredump_info_dump()
Dfault_s.S82 push {r0, lr}
101 mov r2, lr /* EXC_RETURN */
/Zephyr-Core-3.4.0/arch/arc/include/
Dswap_macros.h48 lr r13, [_ARC_V2_SEC_U_SP]
50 lr r13, [_ARC_V2_SEC_K_SP]
53 lr r13, [_ARC_V2_USER_SP]
55 lr r13, [_ARC_V2_KERNEL_SP]
59 lr r13, [_ARC_V2_USER_SP]
75 lr r13, [_ARC_V2_FPU_STATUS]
77 lr r13, [_ARC_V2_FPU_CTRL]
81 lr r13, [_ARC_V2_FPU_DPFP1L]
83 lr r13, [_ARC_V2_FPU_DPFP1H]
85 lr r13, [_ARC_V2_FPU_DPFP2L]
[all …]
/Zephyr-Core-3.4.0/soc/arm/ti_lm3s6965/
Dreboot.S43 ldreq lr, =0xfffffff1
45 ldrne lr, =0xfffffffd
60 bx lr
/Zephyr-Core-3.4.0/arch/arm/core/aarch32/cortex_a_r/
Dexc.S50 stmfd sp, {r0-r3, r12, lr}^
115 subeq lr, #4 /* ARM (!T_BIT) */
116 subne lr, #2 /* Thumb (T_BIT) */
124 stmfd sp, {r0-r3, r12, lr}^
185 sub lr, #4
211 sub lr, #8
Dexc_exit.S166 pop {lr}
182 pop {r0-r3, r12, lr}
248 pop {r0-r3, r12, lr}
265 ldmia sp, {r0-r3, r12, lr}^
D__aeabi_read_tp.S15 bx lr
/Zephyr-Core-3.4.0/soc/arm/nxp_lpc/lpc54xxx/gcc/
Dstartup_LPC54114_cm4.S43 push {lr}
45 pop {lr}
101 bx lr
/Zephyr-Core-3.4.0/include/zephyr/audio/
Ddmic.h189 enum pdm_lr lr) in dmic_build_channel_map() argument
191 return ((((pdm & BIT_MASK(3)) << 1) | lr) << in dmic_build_channel_map()
208 uint32_t channel_map_hi, uint8_t channel, uint8_t *pdm, enum pdm_lr *lr) in dmic_parse_channel_map() argument
216 *lr = (enum pdm_lr) (channel & BIT(0)); in dmic_parse_channel_map()
/Zephyr-Core-3.4.0/include/zephyr/arch/arm/aarch32/
Dexc.h104 sys_define_gpr_with_alias(lr, r14);
131 sys_define_gpr_with_alias(lr, r14);

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