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Searched refs:_ARC_V2_AGU_OS0 (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.4.0/tests/arch/arc/arc_dsp_sharing/src/
Ddsp_regs_arc.h40 z_arc_v2_aux_reg_write(_ARC_V2_AGU_OS0, *temp++); in _load_all_dsp_registers()
60 *temp++ = z_arc_v2_aux_reg_read(_ARC_V2_AGU_OS0); in _store_all_dsp_registers()
/Zephyr-Core-3.4.0/include/zephyr/arch/arc/v2/
Daux_regs.h144 #define _ARC_V2_AGU_OS0 0x5d0 macro
/Zephyr-Core-3.4.0/arch/arc/core/dsp/
Dswap_dsp_macros.h50 lr r13, [_ARC_V2_AGU_OS0]
177 sr r13, [_ARC_V2_AGU_OS0]